[PATCH v3 0/4] dmaengine: memset clarifications and fixes

[PATCH v3 0/4] dmaengine: memset clarifications and fixes

[Ben Walker]

The following contains a clarification for the behavior of the 'value'
parameter in the memset operation. It is intended to be a single byte
pattern as laid out here:

https://lore.kernel.org/dmaengine/YejrA5ZWZ3lTRO%2F1@matsya/

Then I'm attempting to fix all places it is currently used. But note
that I do not have access to this hardware and cannot test it. We'll
really need a maintainer to take a look at each of these to verify that
the changes are correct.

v3:
 - Using signed byte for pattern everywhere

Ben Walker (4):
  dmaengine: Document dmaengine_prep_dma_memset
  dmaengine: at_hdmac: In atc_prep_dma_memset, treat value as a single
    byte
  dmaengine: at_xdmac: In at_xdmac_prep_dma_memset, treat value as a
    single byte
  dmaengine: hidma: In hidma_prep_dma_memset treat value as a single
    byte

 drivers/dma/at_hdmac.c    | 10 +++++++++-
 drivers/dma/at_xdmac.c    |  9 ++++++++-
 drivers/dma/qcom/hidma.c  | 13 ++++++++++++-
 include/linux/dmaengine.h |  8 ++++++++
 4 files changed, 37 insertions(+), 3 deletions(-)

-- 
2.33.1

[PATCH v3 1/4] dmaengine: Document dmaengine_prep_dma_memset

[Ben Walker]

Document this function to make clear the expected behavior of the
'value' parameter. It was intended to match the behavior of POSIX memset
as laid out here:

https://lore.kernel.org/dmaengine/YejrA5ZWZ3lTRO%2F1@matsya/

Signed-off-by: Ben Walker <benjamin.walker@intel.com>
---
 Documentation/driver-api/dmaengine/provider.rst | 6 ++++++
 include/linux/dmaengine.h                       | 8 ++++++++
 2 files changed, 14 insertions(+)

diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst
index 0072c9c7efd34..4f99f0e9bb81d 100644
--- a/Documentation/driver-api/dmaengine/provider.rst
+++ b/Documentation/driver-api/dmaengine/provider.rst
@@ -206,6 +206,12 @@ Currently, the types available are:
   - The device is able to perform parity check using RAID6 P+Q
     algorithm against a memory buffer.
 
+- DMA_MEMSET
+
+  - The device is able to fill memory with the provided pattern
+
+  - The pattern is treated as a single byte signed value.
+
 - DMA_INTERRUPT
 
   - The device is able to trigger a dummy transfer that will
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 842d4f7ca752d..3d3e663e17ac7 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -1031,6 +1031,14 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
 	return chan->device->device_prep_interleaved_dma(chan, xt, flags);
 }
 
+/**
+ * dmaengine_prep_dma_memset() - Prepare a DMA memset descriptor.
+ * @chan: The channel to be used for this descriptor
+ * @dest: Address of buffer to be set
+ * @value: Treated as a single byte value that fills the destination buffer
+ * @len: The total size of dest
+ * @flags: DMA engine flags
+ */
 static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memset(
 		struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
 		unsigned long flags)
-- 
2.35.1

[PATCH v3 2/4] dmaengine: at_hdmac: In atc_prep_dma_memset, treat value as a single byte

[Ben Walker]

The value passed in to .prep_dma_memset is to be treated as a single
byte repeating pattern.

Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 drivers/dma/at_hdmac.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index 30ae36124b1db..5a50423b7378e 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -942,6 +942,7 @@ atc_prep_dma_memset(struct dma_chan *chan, dma_addr_t dest, int value,
 	struct at_desc		*desc;
 	void __iomem		*vaddr;
 	dma_addr_t		paddr;
+	char			fill_pattern;
 
 	dev_vdbg(chan2dev(chan), "%s: d%pad v0x%x l0x%zx f0x%lx\n", __func__,
 		&dest, value, len, flags);
@@ -963,7 +964,14 @@ atc_prep_dma_memset(struct dma_chan *chan, dma_addr_t dest, int value,
 			__func__);
 		return NULL;
 	}
-	*(u32*)vaddr = value;
+
+	/* Only the first byte of value is to be used according to dmaengine */
+	fill_pattern = (char)value;
+
+	*(u32*)vaddr = (fill_pattern << 24) |
+		       (fill_pattern << 16) |
+		       (fill_pattern << 8) |
+		       fill_pattern;
 
 	desc = atc_create_memset_desc(chan, paddr, dest, len);
 	if (!desc) {
-- 
2.35.1

[PATCH v3 3/4] dmaengine: at_xdmac: In at_xdmac_prep_dma_memset, treat value as a single byte

[Ben Walker]

The value passed in to .prep_dma_memset is to be treated as a single
byte repeating pattern.

Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 drivers/dma/at_xdmac.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index a1da2b4b6d732..fb9df3a69babd 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -1202,6 +1202,7 @@ static struct at_xdmac_desc *at_xdmac_memset_create_desc(struct dma_chan *chan,
 	unsigned long		flags;
 	size_t			ublen;
 	u32			dwidth;
+	char			pattern;
 	/*
 	 * WARNING: The channel configuration is set here since there is no
 	 * dmaengine_slave_config call in this case. Moreover we don't know the
@@ -1244,10 +1245,16 @@ static struct at_xdmac_desc *at_xdmac_memset_create_desc(struct dma_chan *chan,
 
 	chan_cc |= AT_XDMAC_CC_DWIDTH(dwidth);
 
+	/* Only the first byte of value is to be used according to dmaengine */
+	pattern = (char)value;
+
 	ublen = len >> dwidth;
 
 	desc->lld.mbr_da = dst_addr;
-	desc->lld.mbr_ds = value;
+	desc->lld.mbr_ds = (pattern << 24) |
+			   (pattern << 16) |
+			   (pattern << 8) |
+			   pattern;
 	desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV3
 		| AT_XDMAC_MBR_UBC_NDEN
 		| AT_XDMAC_MBR_UBC_NSEN
-- 
2.35.1

[PATCH v3 4/4] dmaengine: hidma: In hidma_prep_dma_memset treat value as a single byte

[Ben Walker]

The value parameter is a single byte, so duplicate it to the 8 byte
range that is used as the pattern.

Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Cc: Sinan Kaya <okaya@kernel.org>
---
 drivers/dma/qcom/hidma.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/qcom/hidma.c b/drivers/dma/qcom/hidma.c
index 65d054bb11aaa..e455957e3ff98 100644
--- a/drivers/dma/qcom/hidma.c
+++ b/drivers/dma/qcom/hidma.c
@@ -431,6 +431,7 @@ hidma_prep_dma_memset(struct dma_chan *dmach, dma_addr_t dest, int value,
 	struct hidma_desc *mdesc = NULL;
 	struct hidma_dev *mdma = mchan->dmadev;
 	unsigned long irqflags;
+	u64 byte_pattern, fill_pattern;
 
 	/* Get free descriptor */
 	spin_lock_irqsave(&mchan->lock, irqflags);
@@ -443,9 +444,19 @@ hidma_prep_dma_memset(struct dma_chan *dmach, dma_addr_t dest, int value,
 	if (!mdesc)
 		return NULL;
 
+	byte_pattern = (char)value;
+	fill_pattern =	(byte_pattern << 56) |
+			(byte_pattern << 48) |
+			(byte_pattern << 40) |
+			(byte_pattern << 32) |
+			(byte_pattern << 24) |
+			(byte_pattern << 16) |
+			(byte_pattern << 8) |
+			byte_pattern;
+
 	mdesc->desc.flags = flags;
 	hidma_ll_set_transfer_params(mdma->lldev, mdesc->tre_ch,
-				     value, dest, len, flags,
+				     fill_pattern, dest, len, flags,
 				     HIDMA_TRE_MEMSET);
 
 	/* Place descriptor in prepared list */
-- 
2.35.1

Re: [PATCH v3 3/4] dmaengine: at_xdmac: In at_xdmac_prep_dma_memset, treat value as a single byte

[Tudor.Ambarus]

Sorry for the delay.
Just wanted to inform you that I plan to test this patch set this week.

Cheers,
ta

Re: [PATCH v3 0/4] dmaengine: memset clarifications and fixes

[Vinod Koul]

On 01-03-22, 11:25, Ben Walker wrote:
> The following contains a clarification for the behavior of the 'value'
> parameter in the memset operation. It is intended to be a single byte
> pattern as laid out here:
> 
> https://lore.kernel.org/dmaengine/YejrA5ZWZ3lTRO%2F1@matsya/
> 
> Then I'm attempting to fix all places it is currently used. But note
> that I do not have access to this hardware and cannot test it. We'll
> really need a maintainer to take a look at each of these to verify that
> the changes are correct.

Applied, thanks

-- 
~Vinod

Re: [PATCH v3 0/4] dmaengine: memset clarifications and fixes

[Tudor.Ambarus]

+ Maxime.

Hi!

On 3/1/22 20:25, Ben Walker wrote:
> The following contains a clarification for the behavior of the 'value'
> parameter in the memset operation. It is intended to be a single byte
> pattern as laid out here:
> 
> https://lore.kernel.org/dmaengine/YejrA5ZWZ3lTRO%2F1@matsya/
> 
> Then I'm attempting to fix all places it is currently used. But note

Sorry for being late. I see there are no in kernel users of
dma_memset/dma_memset_sg methods (other than dmatest.c).
Any idea why do we still keep them?

-- 
Cheers,
ta