[PATCH v5 7/9] dmaengine: dw-edma: Add support for chip specific flags

Frank Li
2022-03-10T19:25:48Z

Add a "flags" field to the "struct dw_edma_chip" so that the controller
drivers can pass flags that are relevant to the platform.

DW_EDMA_CHIP_LOCAL - Used by the controller drivers accessing eDMA
locally. Local eDMA access doesn't require generating MSIs to the remote.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Change from v4 to v5
- split two two patch
- rework commit message
Change from v3 to v4
none
Change from v2 to v3
- rework commit message
- Change to DW_EDMA_CHIP_32BIT_DBI
- using DW_EDMA_CHIP_LOCAL control msi
- Apply Bjorn's comments,
if (!j) {
control |= DW_EDMA_V0_LIE;
if (!(chan->chip->flags & DW_EDMA_CHIP_LOCAL))
control |= DW_EDMA_V0_RIE;
}

if ((chan->chip->flags & DW_EDMA_CHIP_REG32BIT) ||
!IS_ENABLED(CONFIG_64BIT)) {
SET_CH_32(...);
SET_CH_32(...);
} else {
SET_CH_64(...);
}

Change from v1 to v2
- none

drivers/dma/dw-edma/dw-edma-v0-core.c | 9 ++++++---
include/linux/dma/edma.h | 5 +++++
2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c
index 35f2adac93e46..30686bfe1790c 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
@@ -301,6 +301,7 @@ u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir)
static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
{
struct dw_edma_burst *child;
+ struct dw_edma_chan *chan = chunk->chan;
struct dw_edma_v0_lli __iomem *lli;
struct dw_edma_v0_llp __iomem *llp;
u32 control = 0, i = 0;
@@ -314,9 +315,11 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
j = chunk->bursts_alloc;
list_for_each_entry(child, &chunk->burst->list, list) {
j--;
- if (!j)
- control |= (DW_EDMA_V0_LIE | DW_EDMA_V0_RIE);
-
+ if (!j) {
+ control |= DW_EDMA_V0_LIE;
+ if (!(chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL))
+ control |= DW_EDMA_V0_RIE;
+ }
/* Channel control */
SET_LL_32(&lli[i].control, control);
/* Transfer size */
diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h
index c2039246fc08c..5816c8bdf9a64 100644
--- a/include/linux/dma/edma.h
+++ b/include/linux/dma/edma.h
@@ -33,12 +33,16 @@ enum dw_edma_map_format {
EDMA_MF_HDMA_COMPAT = 0x5
};

+/* Probe EDMA engine locally and prevent generate MSI to host side*/
+#define DW_EDMA_CHIP_LOCAL BIT(0)
+
/**
* struct dw_edma_chip - representation of DesignWare eDMA controller hardware
* @dev: struct device of the eDMA controller
* @id: instance ID
* @nr_irqs: total dma irq number
* @ops DMA channel to IRQ number mapping
+ * @flags - DW_EDMA_CHIP_LOCAL
* @reg_base DMA register base address
* @ll_wr_cnt DMA write link list number
* @ll_rd_cnt DMA read link list number
@@ -53,6 +57,7 @@ struct dw_edma_chip {
int id;
int nr_irqs;
const struct dw_edma_core_ops *ops;
+ u32 flags;

void __iomem *reg_base;

--
2.24.0.rc1