From: Mathias Tausen <mta@satlab.com>
To: dmaengine@vger.kernel.org
Cc: "Mathias Tausen" <mta@satlab.com>,
"Lars-Peter Clausen" <lars@metafoo.de>,
"Nuno Sá" <nuno.sa@analog.com>
Subject: [PATCH] dmaengine: axi-dmac: check cache coherency register
Date: Thu, 14 Jul 2022 13:06:44 +0200 [thread overview]
Message-ID: <20220714110644.2849191-1-mta@satlab.com> (raw)
Marking the DMA as cache coherent (dma-coherent in devicetree) is only
safe with versions of axi_dmac that have this feature enabled.
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Mathias Tausen <mta@satlab.com>
---
For context, this patch is related to a recent change to the HDL:
https://github.com/analogdevicesinc/hdl/pull/925
And has been discussed in the Analog Devices tree:
https://github.com/analogdevicesinc/linux/pull/1908
drivers/dma/dma-axi-dmac.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/dma/dma-axi-dmac.c b/drivers/dma/dma-axi-dmac.c
index 6aa5d383da21..1b78e54c2630 100644
--- a/drivers/dma/dma-axi-dmac.c
+++ b/drivers/dma/dma-axi-dmac.c
@@ -18,6 +18,7 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_dma.h>
+#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/slab.h>
@@ -55,6 +56,9 @@
#define AXI_DMAC_DMA_DST_TYPE_GET(x) FIELD_GET(AXI_DMAC_DMA_DST_TYPE_MSK, x)
#define AXI_DMAC_DMA_DST_WIDTH_MSK GENMASK(3, 0)
#define AXI_DMAC_DMA_DST_WIDTH_GET(x) FIELD_GET(AXI_DMAC_DMA_DST_WIDTH_MSK, x)
+#define AXI_DMAC_REG_COHERENCY_DESC 0x14
+#define AXI_DMAC_DST_COHERENT_MSK BIT(0)
+#define AXI_DMAC_DST_COHERENT_GET(x) FIELD_GET(AXI_DMAC_DST_COHERENT_MSK, x)
#define AXI_DMAC_REG_IRQ_MASK 0x80
#define AXI_DMAC_REG_IRQ_PENDING 0x84
@@ -1006,6 +1010,18 @@ static int axi_dmac_probe(struct platform_device *pdev)
axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_MASK, 0x00);
+ if (of_dma_is_coherent(pdev->dev.of_node)) {
+ ret = axi_dmac_read(dmac, AXI_DMAC_REG_COHERENCY_DESC);
+
+ if (version < ADI_AXI_PCORE_VER(4, 4, 'a') ||
+ !AXI_DMAC_DST_COHERENT_GET(ret)) {
+ dev_err(dmac->dma_dev.dev,
+ "Coherent DMA not supported in hardware");
+ ret = -EINVAL;
+ goto err_clk_disable;
+ }
+ }
+
ret = dma_async_device_register(dma_dev);
if (ret)
goto err_clk_disable;
--
2.36.1
next reply other threads:[~2022-07-14 11:09 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-14 11:06 Mathias Tausen [this message]
2022-07-15 10:47 ` [PATCH] dmaengine: axi-dmac: check cache coherency register Sa, Nuno
2022-07-18 7:31 ` Mathias Tausen
2022-07-26 13:03 ` Vinod Koul
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