DMA Engine development
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From: Fenghua Yu <fenghua.yu@intel.com>
To: "Vinod Koul" <vkoul@kernel.org>, "Dave Jiang" <dave.jiang@intel.com>
Cc: dmaengine@vger.kernel.org,
	"linux-kernel" <linux-kernel@vger.kernel.org>,
	Fenghua Yu <fenghua.yu@intel.com>
Subject: [PATCH 0/3] Add descriptor definitions for a few new DSA operations
Date: Mon,  7 Nov 2022 16:39:41 -0800	[thread overview]
Message-ID: <20221108003944.2095567-1-fenghua.yu@intel.com> (raw)

A few new DSA operations are introduced [1]:
1. Memory fill with 16 bytes of pattern.
2. Translation fetch.
3. Data Integrity Extension (DIX) generate.

This series adds descriptor definitions for the new DSA operations.
With the definitions, user can issue the DSA operations to optimize
corresponding transactions.

Reference:
1. DSA 2.0 spec: https://software.intel.com/content/www/us/en/develop/articles/intel-data-streaming-accelerator-architecture-specification.html

Fenghua Yu (3):
  dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in
    memory fill operation
  dmaengine: idxd: Add descriptor definitions for DIX generate operation
  dmaengine: idxd: Add descriptor definitions for translation fetch
    operation

 include/uapi/linux/idxd.h | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

-- 
2.32.0


             reply	other threads:[~2022-11-08  0:39 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-08  0:39 Fenghua Yu [this message]
2022-11-08  0:39 ` [PATCH 1/3] dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in memory fill operation Fenghua Yu
2022-11-08 16:13   ` Dave Jiang
2022-11-08  0:39 ` [PATCH 2/3] dmaengine: idxd: Add descriptor definitions for DIX generate operation Fenghua Yu
2022-11-08  0:39 ` [PATCH 3/3] dmaengine: idxd: Add descriptor definitions for translation fetch operation Fenghua Yu

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