From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: LKML <linux-kernel@vger.kernel.org>,
iommu@lists.linux.dev, "Robin Murphy" <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@nvidia.com>,
"Lu Baolu" <baolu.lu@linux.intel.com>,
Joerg Roedel <joro@8bytes.org>,
dmaengine@vger.kernel.org, vkoul@kernel.org
Cc: "Will Deacon" <will@kernel.org>,
David Woodhouse <dwmw2@infradead.org>,
Raj Ashok <ashok.raj@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>, Yi Liu <yi.l.liu@intel.com>,
"Yu, Fenghua" <fenghua.yu@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
Tony Luck <tony.luck@intel.com>,
"Zanussi, Tom" <tom.zanussi@intel.com>,
Jacob Pan <jacob.jun.pan@linux.intel.com>
Subject: [PATCH v3 4/7] iommu/vt-d: Reserve RID_PASID from global PASID space
Date: Fri, 31 Mar 2023 16:11:34 -0700 [thread overview]
Message-ID: <20230331231137.1947675-5-jacob.jun.pan@linux.intel.com> (raw)
In-Reply-To: <20230331231137.1947675-1-jacob.jun.pan@linux.intel.com>
On VT-d platforms, RID_PASID is used for DMA request without PASID. We
should not treat RID_PASID special instead let it be allocated from the
global PASID number space. Non-zero value can be used in RID_PASID on
Intel VT-d.
For ARM, AMD and others that _always_ use 0 as RID_PASID, there is no
impact in that SVA PASID allocation base is 1.
With this change, devices do both DMA with PASID and SVA will not worry
about conflicts when it comes to allocating PASIDs for in-kernel DMA.
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
---
drivers/iommu/intel/iommu.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 9f737ef55463..cbb2670f88ca 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -3956,6 +3956,10 @@ int __init intel_iommu_init(void)
intel_iommu_enabled = 1;
+ /* Reserved RID_PASID from the global namespace for legacy DMA */
+ WARN_ON(iommu_alloc_global_pasid(PASID_RID2PASID, PASID_RID2PASID) !=
+ PASID_RID2PASID);
+
return 0;
out_free_dmar:
--
2.25.1
next prev parent reply other threads:[~2023-03-31 23:07 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-31 23:11 [PATCH v3 0/7] Re-enable IDXD kernel workqueue under DMA API Jacob Pan
2023-03-31 23:11 ` [PATCH v3 1/7] iommu/vt-d: Use non-privileged mode for all PASIDs Jacob Pan
2023-04-01 13:41 ` Baolu Lu
2023-03-31 23:11 ` [PATCH v3 2/7] iommu/vt-d: Remove PASID supervisor request support Jacob Pan
2023-03-31 23:11 ` [PATCH v3 3/7] iommu/sva: Support allocation of global PASIDs outside SVA Jacob Pan
2023-04-01 13:16 ` Baolu Lu
2023-04-03 20:44 ` Jacob Pan
2023-04-01 13:28 ` Baolu Lu
2023-04-03 20:55 ` Jacob Pan
2023-03-31 23:11 ` Jacob Pan [this message]
2023-04-01 13:43 ` [PATCH v3 4/7] iommu/vt-d: Reserve RID_PASID from global PASID space Baolu Lu
2023-04-03 21:40 ` Jacob Pan
2023-03-31 23:11 ` [PATCH v3 5/7] iommu/vt-d: Make device pasid attachment explicit Jacob Pan
2023-03-31 23:11 ` [PATCH v3 6/7] iommu/vt-d: Implement set_dev_pasid domain op Jacob Pan
2023-04-01 13:48 ` Baolu Lu
2023-04-03 21:48 ` Jacob Pan
2023-04-04 5:24 ` Baolu Lu
2023-03-31 23:11 ` [PATCH v3 7/7] dmaengine/idxd: Re-enable kernel workqueue under DMA API Jacob Pan
2023-03-31 23:31 ` Yu, Fenghua
2023-04-03 21:56 ` Jacob Pan
2023-04-01 13:39 ` Baolu Lu
2023-04-03 21:54 ` Jacob Pan
2023-04-05 12:15 ` Jason Gunthorpe
2023-04-06 2:49 ` Baolu Lu
2023-04-06 12:23 ` [PATCH v3 0/7] Re-enable IDXD " Baolu Lu
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