From: Jisheng Zhang <jszhang@kernel.org>
To: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>,
Vinod Koul <vkoul@kernel.org>
Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 06/11] dmaengine: dw-axi-dmac: move ch irq handling into common routine
Date: Sat, 15 Apr 2023 18:35:56 +0800 [thread overview]
Message-ID: <20230415103601.2979-7-jszhang@kernel.org> (raw)
In-Reply-To: <20230415103601.2979-1-jszhang@kernel.org>
In next patch, we will add per-channel irq support, we will use the
common routine in per-channel irq handler.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
.../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 30 ++++++++++++-------
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index 6087fb7d567a..796fd0136781 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -1101,13 +1101,30 @@ static void axi_chan_block_xfer_complete(struct axi_dma_chan *chan)
spin_unlock_irqrestore(&chan->vc.lock, flags);
}
+static void dw_axi_dma_handle_ch(struct axi_dma_chan *chan)
+{
+ u32 status;
+
+ /* Poll, clear and process this channel interrupt status */
+ status = axi_chan_irq_read(chan);
+ axi_chan_irq_clear(chan, status);
+
+ dev_vdbg(chan->chip->dev, "%s IRQ status: 0x%08x\n", axi_chan_name(chan), status);
+
+ if (status & DWAXIDMAC_IRQ_ALL_ERR)
+ axi_chan_handle_err(chan, status);
+ else if (status & DWAXIDMAC_IRQ_DMA_TRF)
+ axi_chan_block_xfer_complete(chan);
+
+}
+
static irqreturn_t dw_axi_dma_interrupt(int irq, void *dev_id)
{
struct axi_dma_chip *chip = dev_id;
struct dw_axi_dma *dw = chip->dw;
struct axi_dma_chan *chan;
- u32 status, i;
+ u32 i;
/* Disable DMAC interrupts. We'll enable them after processing channels */
axi_dma_irq_disable(chip);
@@ -1115,16 +1132,7 @@ static irqreturn_t dw_axi_dma_interrupt(int irq, void *dev_id)
/* Poll, clear and process every channel interrupt status */
for (i = 0; i < dw->hdata->nr_channels; i++) {
chan = &dw->chan[i];
- status = axi_chan_irq_read(chan);
- axi_chan_irq_clear(chan, status);
-
- dev_vdbg(chip->dev, "%s %u IRQ status: 0x%08x\n",
- axi_chan_name(chan), i, status);
-
- if (status & DWAXIDMAC_IRQ_ALL_ERR)
- axi_chan_handle_err(chan, status);
- else if (status & DWAXIDMAC_IRQ_DMA_TRF)
- axi_chan_block_xfer_complete(chan);
+ dw_axi_dma_handle_ch(chan);
}
/* Re-enable interrupts */
--
2.39.2
next prev parent reply other threads:[~2023-04-15 10:49 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-15 10:35 [PATCH v2 00/11] dmaengine: dw-axi_dmac: bug fix clean up and more features Jisheng Zhang
2023-04-15 10:35 ` [PATCH v2 01/11] dmaengine: dw-axi-dmac: fix reading register when runtime suspended Jisheng Zhang
2023-04-15 10:35 ` [PATCH v2 02/11] dmaengine: dw-axi-dmac: remove unnecessary devm_free_irq() calling Jisheng Zhang
2023-04-15 10:35 ` [PATCH v2 03/11] dmaengine: dw-axi-dmac: remove unnecessary axi_dma_enable() calling Jisheng Zhang
2023-04-15 10:35 ` [PATCH v2 04/11] dmaengine: dw-axi-dmac: remove redundant axi_dma_disable() calling Jisheng Zhang
2023-04-15 10:35 ` [PATCH v2 05/11] dmaengine: dw-axi-dmac: delay irq getting until request_irq Jisheng Zhang
2023-04-15 10:35 ` Jisheng Zhang [this message]
2023-04-15 10:35 ` [PATCH v2 07/11] dmaengine: dw-axi-dmac: support per channel irq Jisheng Zhang
2023-04-15 10:35 ` [PATCH v2 08/11] dmaengine: dw-axi-dmac: support dma-channel-mask Jisheng Zhang
2023-04-15 10:35 ` [PATCH v2 09/11] dmaengine: dw-axi-dmac: try best to get residue when tx is running Jisheng Zhang
2023-04-15 10:36 ` [PATCH v2 10/11] dmaengine: dw-axi-dmac: move dma_chan_tx_status() Jisheng Zhang
2023-04-15 10:36 ` [PATCH v2 11/11] dmaengine: dw-axi-dmac: support polled mode Jisheng Zhang
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