From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: Baolu Lu <baolu.lu@linux.intel.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
iommu@lists.linux.dev, Jason Gunthorpe <jgg@nvidia.com>,
Joerg Roedel <joro@8bytes.org>,
dmaengine@vger.kernel.org, vkoul@kernel.org,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>,
David Woodhouse <dwmw2@infradead.org>,
Raj Ashok <ashok.raj@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>, Yi Liu <yi.l.liu@intel.com>,
"Yu, Fenghua" <fenghua.yu@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
Tony Luck <tony.luck@intel.com>,
"Zanussi, Tom" <tom.zanussi@intel.com>,
narayan.ranganathan@intel.com, jacob.jun.pan@linux.intel.com
Subject: Re: [PATCH v6 2/4] iommu: Move global PASID allocation from SVA to core
Date: Mon, 22 May 2023 10:32:13 -0700 [thread overview]
Message-ID: <20230522103011.2b791d5d@jacob-builder> (raw)
In-Reply-To: <b3c543e0-699a-0779-fdd9-b799c5230da0@linux.intel.com>
Hi Baolu,
On Sun, 21 May 2023 14:21:25 +0800, Baolu Lu <baolu.lu@linux.intel.com>
wrote:
> On 5/20/23 4:32 AM, Jacob Pan wrote:
> > Global PASID can be used beyond SVA. For example, drivers that use
> > Intel ENQCMD to submit work must use global PASIDs in that PASID
> > is stored in a per CPU MSR. When such device need to submit work
> > for in-kernel DMA with PASID, it must allocate PASIDs from the same
> > global number space to avoid conflict.
> >
> > This patch moves global PASID allocation APIs from SVA to IOMMU APIs.
> > Reserved PASIDs, currently only RID_PASID, are excluded from the global
> > PASID allocation.
> >
> > It is expected that device drivers will use the allocated PASIDs to
> > attach to appropriate IOMMU domains for use.
> >
> > Signed-off-by: Jacob Pan<jacob.jun.pan@linux.intel.com>
> > ---
> > v6: explicitly exclude reserved a range from SVA PASID allocation
> > check mm PASID compatibility with device
> > v5: move PASID range check inside API so that device drivers only pass
> > in struct device* (Kevin)
> > v4: move dummy functions outside ifdef CONFIG_IOMMU_SVA (Baolu)
> > ---
> > drivers/iommu/iommu-sva.c | 33 ++++++++++++++-------------------
> > drivers/iommu/iommu.c | 24 ++++++++++++++++++++++++
> > include/linux/iommu.h | 10 ++++++++++
> > 3 files changed, 48 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c
> > index 9821bc44f5ac..7fe8e977d8eb 100644
> > --- a/drivers/iommu/iommu-sva.c
> > +++ b/drivers/iommu/iommu-sva.c
> > @@ -10,33 +10,33 @@
> > #include "iommu-sva.h"
> >
> > static DEFINE_MUTEX(iommu_sva_lock);
> > -static DEFINE_IDA(iommu_global_pasid_ida);
> >
> > /* Allocate a PASID for the mm within range (inclusive) */
> > -static int iommu_sva_alloc_pasid(struct mm_struct *mm, ioasid_t min,
> > ioasid_t max) +static int iommu_sva_alloc_pasid(struct mm_struct *mm,
> > struct device *dev) {
> > + ioasid_t pasid;
> > int ret = 0;
> >
> > - if (min == IOMMU_PASID_INVALID ||
> > - max == IOMMU_PASID_INVALID ||
> > - min == 0 || max < min)
> > - return -EINVAL;
> > -
> > if (!arch_pgtable_dma_compat(mm))
> > return -EBUSY;
> >
> > mutex_lock(&iommu_sva_lock);
> > /* Is a PASID already associated with this mm? */
> > if (mm_valid_pasid(mm)) {
> > - if (mm->pasid < min || mm->pasid > max)
> > - ret = -EOVERFLOW;
> > + if (mm->pasid <= dev->iommu->max_pasids)
> > + goto out;
> > + dev_err(dev, "current mm PASID %d exceeds device range
> > %d!",
> > + mm->pasid, dev->iommu->max_pasids);
> > + ret = -ERANGE;
> > goto out;
> > }
>
> Nit: Above is just refactoring, so it's better to keep the code behavior
> consistent. For example, no need to change the error# from -EOVERFLOW to
> -ERANGE, and no need to leave a new kernel message.
>
> Anyway, if you think these changes are helpful, it's better to have them
> in separated patches.
>
> In the end, perhaps we can simply have code like this:
>
> if (mm_valid_pasid(mm)) {
> if (mm->pasid > dev->iommu->max_pasids)
> ret = -EOVERFLOW;
> goto out;
> }
>
> Others look good to me, with above addressed,
>
> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
>
much better, will fix.
Thanks,
Jacob
next prev parent reply other threads:[~2023-05-22 17:27 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-19 20:32 [PATCH v6 0/4] Re-enable IDXD kernel workqueue under DMA API Jacob Pan
2023-05-19 20:32 ` [PATCH v6 1/4] iommu: Generalize default PCIe requester ID PASID Jacob Pan
2023-05-21 6:21 ` Baolu Lu
2023-05-23 14:47 ` Jean-Philippe Brucker
2023-05-23 15:26 ` Jacob Pan
2023-05-29 19:50 ` Jason Gunthorpe
2023-05-19 20:32 ` [PATCH v6 2/4] iommu: Move global PASID allocation from SVA to core Jacob Pan
2023-05-21 6:21 ` Baolu Lu
2023-05-22 17:32 ` Jacob Pan [this message]
2023-05-29 19:43 ` Jason Gunthorpe
2023-05-19 20:32 ` [PATCH v6 3/4] iommu/vt-d: Add set_dev_pasid callback for dma domain Jacob Pan
2023-05-29 19:48 ` Jason Gunthorpe
2023-05-30 2:19 ` Baolu Lu
2023-05-30 16:55 ` Jason Gunthorpe
2023-05-31 4:02 ` Baolu Lu
2023-05-19 20:32 ` [PATCH v6 4/4] dmaengine/idxd: Re-enable kernel workqueue under DMA API Jacob Pan
2023-05-21 6:29 ` Baolu Lu
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