From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: Baolu Lu <baolu.lu@linux.intel.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
iommu@lists.linux.dev, Jason Gunthorpe <jgg@nvidia.com>,
Joerg Roedel <joro@8bytes.org>,
Robin Murphy <robin.murphy@arm.com>,
Jean-Philippe Brucker <jean-philippe@linaro.com>,
dmaengine@vger.kernel.org, vkoul@kernel.org,
Will Deacon <will@kernel.org>,
David Woodhouse <dwmw2@infradead.org>,
Raj Ashok <ashok.raj@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>, Yi Liu <yi.l.liu@intel.com>,
"Yu, Fenghua" <fenghua.yu@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
Tony Luck <tony.luck@intel.com>,
"Zanussi, Tom" <tom.zanussi@intel.com>,
rex.zhang@intel.com, xiaochen.shen@intel.com,
narayan.ranganathan@intel.com, jacob.jun.pan@linux.intel.com
Subject: Re: [PATCH v8 2/7] iommu: Move global PASID allocation from SVA to core
Date: Tue, 11 Jul 2023 07:32:28 -0700 [thread overview]
Message-ID: <20230711073228.7c4977f8@jacob-builder> (raw)
In-Reply-To: <08830c11-5528-0c42-0bc3-89c3796611fe@linux.intel.com>
Hi Baolu,
On Sat, 10 Jun 2023 20:13:03 +0800, Baolu Lu <baolu.lu@linux.intel.com>
wrote:
> On 6/3/23 2:22 AM, Jacob Pan wrote:
> > +ioasid_t iommu_alloc_global_pasid_dev(struct device *dev)
> > +{
> > + int ret;
> > + ioasid_t max;
> > +
> > + max = dev->iommu->max_pasids;
> > + /*
> > + * max_pasids is set up by vendor driver based on number of
> > PASID bits
> > + * supported but the IDA allocation is inclusive.
> > + */
> > + ret = ida_alloc_range(&iommu_global_pasid_ida,
> > IOMMU_FIRST_GLOBAL_PASID, max - 1, GFP_KERNEL);
> > + if (ret < 0)
> > + return IOMMU_PASID_INVALID;
> > +
> > + return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(iommu_alloc_global_pasid_dev);
>
> "dev->iommu->max_pasids == 0" indicates no pasid support on the device.
> The code should return IOMMU_PASID_INVALID explicitly. Perhaps we can
> make this function like this:
>
> ioasid_t iommu_alloc_global_pasid_dev(struct device *dev)
> {
> int ret;
>
> if (!dev->iommu->max_pasids)
> return IOMMU_PASID_INVALID;
>
> /*
> * max_pasids is set up by vendor driver based on number of
> PASID bits
> * supported but the IDA allocation is inclusive.
> */
> ret = ida_alloc_range(&iommu_global_pasid_ida,
> IOMMU_FIRST_GLOBAL_PASID,
> dev->iommu->max_pasids - 1, GFP_KERNEL);
>
> return ret < 0 ? IOMMU_PASID_INVALID : ret;
> }
> EXPORT_SYMBOL_GPL(iommu_alloc_global_pasid_dev);
>
good catch, sorry i missed this. let me send an updated version.
> Other change in this series looks good to me.
>
> I hope I can queue this series including above change as part of my VT-d
> update for v6.5 to Joerg if no objection.
>
> Let's try to re-enable this key feature of Intel idxd driver in v6.5.
>
> Best regards,
> baolu
Thanks,
Jacob
next prev parent reply other threads:[~2023-07-11 14:28 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-02 18:22 [PATCH v8 0/7] Re-enable IDXD kernel workqueue under DMA API Jacob Pan
2023-06-02 18:22 ` [PATCH v8 1/7] iommu: Generalize PASID 0 for normal DMA w/o PASID Jacob Pan
2023-06-02 18:22 ` [PATCH v8 2/7] iommu: Move global PASID allocation from SVA to core Jacob Pan
2023-06-10 12:13 ` Baolu Lu
2023-06-13 3:06 ` Baolu Lu
2023-06-14 17:19 ` Jacob Pan
2023-07-11 14:32 ` Jacob Pan [this message]
2023-06-02 18:22 ` [PATCH v8 3/7] iommu/vt-d: Add domain_flush_pasid_iotlb() Jacob Pan
2023-06-14 8:16 ` Tian, Kevin
2023-06-02 18:22 ` [PATCH v8 4/7] iommu/vt-d: Remove pasid_mutex Jacob Pan
2023-06-14 8:18 ` Tian, Kevin
2023-06-02 18:22 ` [PATCH v8 5/7] iommu/vt-d: Make prq draining code generic Jacob Pan
2023-06-02 18:22 ` [PATCH v8 6/7] iommu/vt-d: Add set_dev_pasid callback for dma domain Jacob Pan
2023-06-02 18:22 ` [PATCH v8 7/7] dmaengine/idxd: Re-enable kernel workqueue under DMA API Jacob Pan
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