From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD0FBE7544F for ; Tue, 3 Oct 2023 12:15:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232271AbjJCMPy (ORCPT ); Tue, 3 Oct 2023 08:15:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36622 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231960AbjJCMPt (ORCPT ); Tue, 3 Oct 2023 08:15:49 -0400 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::226]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A0F8A6; Tue, 3 Oct 2023 05:15:45 -0700 (PDT) Received: by mail.gandi.net (Postfix) with ESMTPSA id BFC7EC0012; Tue, 3 Oct 2023 12:15:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1696335344; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zXx1lSnltg4BwldcbEtIyXvJaPMruxJjemPAO9ciyhc=; b=D4riTb3TgcKOjBZ5xBZ5t/yW5UPe3YkUar2Zn5NfTDl5jS0a6fERzysQAUPQMCz/TlcK7Q hq/jClnQiOHiYSuFdos79H+zvM/Wg93ZiIicRustgoecIVbep7Wz/0nIASJYQxaqb4av9+ Z6I/z751xoQwihkjPTBPt7rkQ/rjhK3uXOC5gqvr4X/mngQMqxyghfYnUn2FbPhrZnwqNh dcFSFjw6HN0v2nM8dDcqPvX1BcU+z34q6jxGZ65KEZ2+CYjJtLI4yC2W7QOtL4Qzd9oLu4 prqL1ECZ5+fX08zNkwoR2Q5rN4iZuDW3eStPni5EBELA4OiRclivbg7kFtcb+g== From: =?UTF-8?q?K=C3=B6ry=20Maincent?= To: Cai Huoqing , Manivannan Sadhasivam , Serge Semin , Vinod Koul , Gustavo Pimentel , dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Thomas Petazzoni , Gustavo Pimentel , Herve Codina , Kory Maincent Subject: [PATCH v2 4/5] dmaengine: dw-edma: HDMA: Add sync read before starting the DMA transfer in remote setup Date: Tue, 3 Oct 2023 14:15:42 +0200 Message-Id: <20231003121542.3139696-1-kory.maincent@bootlin.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-GND-Sasl: kory.maincent@bootlin.com Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org From: Kory Maincent The Linked list element and pointer are not stored in the same memory as the HDMA controller register. If the doorbell register is toggled before the full write of the linked list a race condition error can appears. In remote setup we can only use a readl to the memory to assured the full write has occurred. Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") Signed-off-by: Kory Maincent --- Changes in v2: - Move the sync read in a function. - Add commments --- drivers/dma/dw-edma/dw-hdma-v0-core.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c index 0cce1880cfdc..9109dd6c2e76 100644 --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c @@ -221,6 +221,20 @@ static void dw_hdma_v0_core_write_chunk(struct dw_edma_chunk *chunk) dw_hdma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); } +static void dw_hdma_v0_sync_ll_data(struct dw_edma_chunk *chunk) +{ + /* + * In case of remote HDMA engine setup, the DW PCIe RP/EP internals + * configuration registers and Application memory are normally accessed + * over different buses. Ensure LL-data reaches the memory before the + * doorbell register is toggled by issuing the dummy-read from the remote + * LL memory in a hope that the posted MRd TLP will return only after the + * last MWr TLP is completed + */ + if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) + readl(chunk->ll_region.vaddr.io); +} + static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) { struct dw_edma_chan *chan = chunk->chan; @@ -251,6 +265,9 @@ static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) /* Set consumer cycle */ SET_CH_32(dw, chan->dir, chan->id, cycle_sync, HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT); + + dw_hdma_v0_sync_ll_data(chunk); + /* Doorbell */ SET_CH_32(dw, chan->dir, chan->id, doorbell, HDMA_V0_DOORBELL_START); } -- 2.25.1