From: "Csókás, Bence" <csokas.bence@prolan.hu>
To: <dmaengine@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-sunxi@lists.linux.dev>, <linux-kernel@vger.kernel.org>
Cc: "Mesih Kilinc" <mesihkilinc@gmail.com>,
"Chen-Yu Tsai" <wens@kernel.org>,
"Krzysztof Kozlowski" <krzk@kernel.org>,
"Csókás, Bence" <csokas.bence@prolan.hu>,
"Vinod Koul" <vkoul@kernel.org>, "Chen-Yu Tsai" <wens@csie.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>
Subject: [PATCH v4 02/10] dma-engine: sun4i: Add has_reset option to quirk
Date: Thu, 31 Oct 2024 13:35:28 +0100 [thread overview]
Message-ID: <20241031123538.2582675-2-csokas.bence@prolan.hu> (raw)
In-Reply-To: <20241031123538.2582675-1-csokas.bence@prolan.hu>
From: Mesih Kilinc <mesihkilinc@gmail.com>
Allwinner suniv F1C100s has a reset bit for DMA in CCU. Sun4i do not
has this bit but in order to support suniv we need to add it. So add
support for reset bit.
Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
[ csokas.bence: Rebased and addressed comments ]
Signed-off-by: Csókás, Bence <csokas.bence@prolan.hu>
---
Notes:
Changes in v2:
* Call reset_control_deassert() unconditionally, as it supports optional resets
* Use dev_err_probe()
* Whitespace
Changes in v3:
* More dev_err_probe() fixes
Changes in v3:
* Use return value of dev_err_probe()
drivers/dma/sun4i-dma.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/drivers/dma/sun4i-dma.c b/drivers/dma/sun4i-dma.c
index d472f57a39ea..4626cc8ad114 100644
--- a/drivers/dma/sun4i-dma.c
+++ b/drivers/dma/sun4i-dma.c
@@ -15,6 +15,7 @@
#include <linux/of_dma.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
+#include <linux/reset.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
@@ -159,6 +160,7 @@ struct sun4i_dma_config {
u8 ddma_drq_sdram;
u8 max_burst;
+ bool has_reset;
};
struct sun4i_dma_pchan {
@@ -208,6 +210,7 @@ struct sun4i_dma_dev {
int irq;
spinlock_t lock;
const struct sun4i_dma_config *cfg;
+ struct reset_control *rst;
};
static struct sun4i_dma_dev *to_sun4i_dma_dev(struct dma_device *dev)
@@ -1215,6 +1218,15 @@ static int sun4i_dma_probe(struct platform_device *pdev)
return PTR_ERR(priv->clk);
}
+ if (priv->cfg->has_reset) {
+ priv->rst = devm_reset_control_get_exclusive(&pdev->dev,
+ NULL);
+ if (IS_ERR(priv->rst)) {
+ return dev_err_probe(&pdev->dev, PTR_ERR(priv->rst),
+ "Failed to get reset control\n");
+ }
+ }
+
platform_set_drvdata(pdev, priv);
spin_lock_init(&priv->lock);
@@ -1287,6 +1299,14 @@ static int sun4i_dma_probe(struct platform_device *pdev)
return ret;
}
+ /* Deassert the reset control */
+ ret = reset_control_deassert(priv->rst);
+ if (ret) {
+ dev_err_probe(&pdev->dev, ret,
+ "Failed to deassert the reset control\n");
+ goto err_clk_disable;
+ }
+
/*
* Make sure the IRQs are all disabled and accounted for. The bootloader
* likes to leave these dirty
@@ -1356,6 +1376,7 @@ static struct sun4i_dma_config sun4i_a10_dma_cfg = {
.ddma_drq_sdram = SUN4I_DDMA_DRQ_TYPE_SDRAM,
.max_burst = SUN4I_MAX_BURST,
+ .has_reset = false,
};
static const struct of_device_id sun4i_dma_match[] = {
--
2.34.1
next prev parent reply other threads:[~2024-10-31 12:36 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-31 12:35 [PATCH v4 01/10] dma-engine: sun4i: Add a quirk to support different chips Csókás, Bence
2024-10-31 12:35 ` Csókás, Bence [this message]
2024-10-31 15:47 ` [PATCH v4 02/10] dma-engine: sun4i: Add has_reset option to quirk Krzysztof Kozlowski
2024-10-31 12:35 ` [PATCH v4 03/10] dt-bindings: dmaengine: Add Allwinner suniv F1C100s DMA Csókás, Bence
2024-10-31 18:17 ` Rob Herring
2024-11-02 8:57 ` Csókás Bence
2024-10-31 12:35 ` [PATCH v4 04/10] dma-engine: sun4i: Add support for Allwinner suniv F1C100s Csókás, Bence
2024-10-31 19:05 ` Amit Singh Tomar
2024-11-02 9:06 ` Csókás Bence
2024-10-31 18:15 ` [PATCH v4 01/10] dma-engine: sun4i: Add a quirk to support different chips Amit Singh Tomar
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