[PATCH] fsldma: Support 40 bit DMA addresses where capable

[Ben Collins <bcollins@kernel.org>]

[-- Attachment #1: Type: text/plain, Size: 1845 bytes --]

On 64-bit QorIQ platforms like T4240, the CPU supports 40-bit addressing
and memory configurations > 64GiB. The fsldma driver is limiting itself
to only 64GiB in all Elo configurations.

Setup fsldma driver to make use of the full 40-bit addressing space,
specifically on the e5500 and e6500 CPUs.

Signed-off-by: Ben Collins <bcollins@kernel.org>
Cc: Zhang Wei <zw@zh-kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: dmaengine@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 drivers/dma/fsldma.c | 2 +-
 drivers/dma/fsldma.h | 7 +++++++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index b5e7d18b97669..8c01963ad47d8 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1254,7 +1254,7 @@ static int fsldma_of_probe(struct platform_device *op)
 	fdev->common.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
 	fdev->common.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
 
-	dma_set_mask(&(op->dev), DMA_BIT_MASK(36));
+	dma_set_mask(&(op->dev), DMA_BIT_MASK(ELO_MAX_PHYS_BITS));
 
 	platform_set_drvdata(op, fdev);
 
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index 308bed0a560ac..1e7bd37208412 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -13,6 +13,13 @@
 #include <linux/dmapool.h>
 #include <linux/dmaengine.h>
 
+/* Physical addressing capability */
+#if defined(CONFIG_E6500_CPU) || defined(CONFIG_E5500_CPU)
+#define ELO_MAX_PHYS_BITS	40
+#else
+#define ELO_MAX_PHYS_BITS	36
+#endif
+
 /* Define data structures needed by Freescale
  * MPC8540 and MPC8349 DMA controller.
  */
-- 
2.49.0


-- 
 Ben Collins
 https://libjwt.io
 https://github.com/benmcollins
 --
 3EC9 7598 1672 961A 1139  173A 5D5A 57C7 242B 22CF

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]