[PATCH 0/3] Rewrite MediaTek UART APDMA driver to support more than 33 bits

[PATCH 0/3] Rewrite MediaTek UART APDMA driver to support more than 33 bits

[Max Shevchenko via B4 Relay]

This patch series aims to support more than 33 bits for the MediaTek
APDMA driver, since newer SoCs like MT6795, MT6779 or MT6985 have higher
values for the DMA bitmask.

The reference SoCs for bitmask values were taken from the downstream
kernel (6.6) for the MT6991 SoC. 

Signed-off-by: Max Shevchenko <wctrl@proton.me>
---
Max Shevchenko (3):
      dt-bindings: dma: mediatek,uart-dma: drop mediatek,dma-33bits property
      dmaengine: mediatek: mtk-uart-apdma: support more than 33 bits for DMA bitmask
      arm64: dts: mediatek: mt6795: drop mediatek,dma-33bits property

 .../devicetree/bindings/dma/mediatek,uart-dma.yaml | 11 ++---
 arch/arm64/boot/dts/mediatek/mt6795.dtsi           |  4 +-
 drivers/dma/mediatek/mtk-uart-apdma.c              | 47 ++++++++++++++++------
 3 files changed, 39 insertions(+), 23 deletions(-)
---
base-commit: f83ec76bf285bea5727f478a68b894f5543ca76e
change-id: 20250921-uart-apdma-9ae76e42f213

Best regards,
-- 
Max Shevchenko <wctrl@proton.me>

[PATCH 1/3] dt-bindings: dma: mediatek,uart-dma: drop mediatek,dma-33bits property

[Max Shevchenko via B4 Relay]

From: Max Shevchenko <wctrl@proton.me>

Many newer SoCs support more than 33 bits for DMA.
Drop the property in order to switch to the platform data.

The reference SoCs were taken from the downstream kernel (6.6) for
the MT6991 SoC.

Signed-off-by: Max Shevchenko <wctrl@proton.me>
---
 Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
index dab468a88942d694525aa391f695c44d192f0c42..9dfdfe81af7edbe3540e4b757547a5d5e6ae810c 100644
--- a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
@@ -22,12 +22,14 @@ properties:
       - items:
           - enum:
               - mediatek,mt2712-uart-dma
-              - mediatek,mt6795-uart-dma
               - mediatek,mt8365-uart-dma
               - mediatek,mt8516-uart-dma
           - const: mediatek,mt6577-uart-dma
       - enum:
-          - mediatek,mt6577-uart-dma
+          - mediatek,mt6577-uart-dma  # 32 bits
+          - mediatek,mt6795-uart-dma  # 33 bits
+          - mediatek,mt6779-uart-dma  # 34 bits
+          - mediatek,mt6985-uart-dma  # 35 bits
 
   reg:
     minItems: 1
@@ -56,10 +58,6 @@ properties:
       Number of virtual channels of the UART APDMA controller
     maximum: 16
 
-  mediatek,dma-33bits:
-    type: boolean
-    description: Enable 33-bits UART APDMA support
-
 required:
   - compatible
   - reg
@@ -116,7 +114,6 @@ examples:
             dma-requests = <12>;
             clocks = <&pericfg CLK_PERI_AP_DMA>;
             clock-names = "apdma";
-            mediatek,dma-33bits;
             #dma-cells = <1>;
         };
     };

-- 
2.51.0

Re: [PATCH 1/3] dt-bindings: dma: mediatek,uart-dma: drop mediatek,dma-33bits property

[Rob Herring]

On Sun, Sep 21, 2025 at 02:03:40PM +0300, Max Shevchenko wrote:
> Many newer SoCs support more than 33 bits for DMA.
> Drop the property in order to switch to the platform data.
> 
> The reference SoCs were taken from the downstream kernel (6.6) for
> the MT6991 SoC.
> 
> Signed-off-by: Max Shevchenko <wctrl@proton.me>
> ---
>  Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml | 11 ++++-------
>  1 file changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
> index dab468a88942d694525aa391f695c44d192f0c42..9dfdfe81af7edbe3540e4b757547a5d5e6ae810c 100644
> --- a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
> +++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
> @@ -22,12 +22,14 @@ properties:
>        - items:
>            - enum:
>                - mediatek,mt2712-uart-dma
> -              - mediatek,mt6795-uart-dma
>                - mediatek,mt8365-uart-dma
>                - mediatek,mt8516-uart-dma
>            - const: mediatek,mt6577-uart-dma
>        - enum:
> -          - mediatek,mt6577-uart-dma
> +          - mediatek,mt6577-uart-dma  # 32 bits
> +          - mediatek,mt6795-uart-dma  # 33 bits

Unless all existing s/w supported mediatek,mt6795-uart-dma, you just 
broke this platform which was relying on the fallback compatible. 

> +          - mediatek,mt6779-uart-dma  # 34 bits
> +          - mediatek,mt6985-uart-dma  # 35 bits
>  
>    reg:
>      minItems: 1
> @@ -56,10 +58,6 @@ properties:
>        Number of virtual channels of the UART APDMA controller
>      maximum: 16
>  
> -  mediatek,dma-33bits:
> -    type: boolean
> -    description: Enable 33-bits UART APDMA support

If this is in use, you need to mark it 'deprecated' instead.

> -
>  required:
>    - compatible
>    - reg
> @@ -116,7 +114,6 @@ examples:
>              dma-requests = <12>;
>              clocks = <&pericfg CLK_PERI_AP_DMA>;
>              clock-names = "apdma";
> -            mediatek,dma-33bits;
>              #dma-cells = <1>;
>          };
>      };
> 
> -- 
> 2.51.0
> 

Re: [PATCH 1/3] dt-bindings: dma: mediatek,uart-dma: drop mediatek,dma-33bits property

[Max Shevchenko]

On Monday, September 22nd, 2025 at 11:47 PM, Rob Herring <robh@kernel.org> wrote:

> On Sun, Sep 21, 2025 at 02:03:40PM +0300, Max Shevchenko wrote:
> 
> > Many newer SoCs support more than 33 bits for DMA.
> > Drop the property in order to switch to the platform data.
> > 
> > The reference SoCs were taken from the downstream kernel (6.6) for
> > the MT6991 SoC.
> > 
> > Signed-off-by: Max Shevchenko wctrl@proton.me
> > ---
> > Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml | 11 ++++-------
> > 1 file changed, 4 insertions(+), 7 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
> > index dab468a88942d694525aa391f695c44d192f0c42..9dfdfe81af7edbe3540e4b757547a5d5e6ae810c 100644
> > --- a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
> > +++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
> > @@ -22,12 +22,14 @@ properties:
> > - items:
> > - enum:
> > - mediatek,mt2712-uart-dma
> > - - mediatek,mt6795-uart-dma
> > - mediatek,mt8365-uart-dma
> > - mediatek,mt8516-uart-dma
> > - const: mediatek,mt6577-uart-dma
> > - enum:
> > - - mediatek,mt6577-uart-dma
> > + - mediatek,mt6577-uart-dma # 32 bits
> > + - mediatek,mt6795-uart-dma # 33 bits
> 
> 
> Unless all existing s/w supported mediatek,mt6795-uart-dma, you just
> broke this platform which was relying on the fallback compatible.
> 


As of v6.17-rc6 and linux-next 20250922, the only user of the
mediatek,mt6795-uart-dma compatible is the MT6795 itself, which also
uses the mediatek,dma-33bits property. The second patch makes driver
to set the DMA bitmask based on the compatible.
Therefore I don't think it breaks the platform.

> > + - mediatek,mt6779-uart-dma # 34 bits
> > + - mediatek,mt6985-uart-dma # 35 bits
> > 
> > reg:
> > minItems: 1
> > @@ -56,10 +58,6 @@ properties:
> > Number of virtual channels of the UART APDMA controller
> > maximum: 16
> > 
> > - mediatek,dma-33bits:
> > - type: boolean
> > - description: Enable 33-bits UART APDMA support
> 
> 
> If this is in use, you need to mark it 'deprecated' instead.
> 


The same question here, third patch removes this property from its
sole user. Does it actually need to be marked as deprecated and
not deleted?

> > -
> > required:
> > - compatible
> > - reg
> > @@ -116,7 +114,6 @@ examples:
> > dma-requests = <12>;
> > clocks = <&pericfg CLK_PERI_AP_DMA>;
> > clock-names = "apdma";
> > - mediatek,dma-33bits;
> > #dma-cells = <1>;
> > };
> > };
> > 
> > --
> > 2.51.0

Sincerely,
Max

[PATCH 2/3] dmaengine: mediatek: mtk-uart-apdma: support more than 33 bits for DMA bitmask

[Max Shevchenko via B4 Relay]

From: Max Shevchenko <wctrl@proton.me>

Drop mediatek,dma-33bits property and introduce a platform data with
field representing DMA bitmask.

The reference SoCs were taken from the downstream kernel (6.6) for
the MT6991 SoC.

Signed-off-by: Max Shevchenko <wctrl@proton.me>
---
 drivers/dma/mediatek/mtk-uart-apdma.c | 47 +++++++++++++++++++++++++----------
 1 file changed, 34 insertions(+), 13 deletions(-)

diff --git a/drivers/dma/mediatek/mtk-uart-apdma.c b/drivers/dma/mediatek/mtk-uart-apdma.c
index 08e15177427b94246951d38a2a1d76875c1e452e..68dd3a4ee0d88fd508870a5de24ae67505023495 100644
--- a/drivers/dma/mediatek/mtk-uart-apdma.c
+++ b/drivers/dma/mediatek/mtk-uart-apdma.c
@@ -42,6 +42,7 @@
 #define VFF_EN_CLR_B		0
 #define VFF_INT_EN_CLR_B	0
 #define VFF_4G_SUPPORT_CLR_B	0
+#define VFF_ORI_ADDR_BITS_NUM	32
 
 /*
  * interrupt trigger level for tx
@@ -74,10 +75,14 @@
 #define VFF_DEBUG_STATUS	0x50
 #define VFF_4G_SUPPORT		0x54
 
+struct mtk_uart_apdma_data {
+	unsigned int dma_bits;
+};
+
 struct mtk_uart_apdmadev {
 	struct dma_device ddev;
 	struct clk *clk;
-	bool support_33bits;
+	unsigned int support_bits;
 	unsigned int dma_requests;
 };
 
@@ -148,7 +153,7 @@ static void mtk_uart_apdma_start_tx(struct mtk_chan *c)
 		mtk_uart_apdma_write(c, VFF_WPT, 0);
 		mtk_uart_apdma_write(c, VFF_INT_FLAG, VFF_TX_INT_CLR_B);
 
-		if (mtkd->support_33bits)
+		if (mtkd->support_bits > VFF_ORI_ADDR_BITS_NUM)
 			mtk_uart_apdma_write(c, VFF_4G_SUPPORT, VFF_4G_EN_B);
 	}
 
@@ -191,7 +196,7 @@ static void mtk_uart_apdma_start_rx(struct mtk_chan *c)
 		mtk_uart_apdma_write(c, VFF_RPT, 0);
 		mtk_uart_apdma_write(c, VFF_INT_FLAG, VFF_RX_INT_CLR_B);
 
-		if (mtkd->support_33bits)
+		if (mtkd->support_bits > VFF_ORI_ADDR_BITS_NUM)
 			mtk_uart_apdma_write(c, VFF_4G_SUPPORT, VFF_4G_EN_B);
 	}
 
@@ -297,7 +302,7 @@ static int mtk_uart_apdma_alloc_chan_resources(struct dma_chan *chan)
 		goto err_pm;
 	}
 
-	if (mtkd->support_33bits)
+	if (mtkd->support_bits > VFF_ORI_ADDR_BITS_NUM)
 		mtk_uart_apdma_write(c, VFF_4G_SUPPORT, VFF_4G_SUPPORT_CLR_B);
 
 err_pm:
@@ -467,8 +472,27 @@ static void mtk_uart_apdma_free(struct mtk_uart_apdmadev *mtkd)
 	}
 }
 
+static const struct mtk_uart_apdma_data mt6577_data = {
+	.dma_bits = 32
+};
+
+static const struct mtk_uart_apdma_data mt6795_data = {
+	.dma_bits = 33
+};
+
+static const struct mtk_uart_apdma_data mt6779_data = {
+	.dma_bits = 34
+};
+
+static const struct mtk_uart_apdma_data mt6985_data = {
+	.dma_bits = 35
+};
+
 static const struct of_device_id mtk_uart_apdma_match[] = {
-	{ .compatible = "mediatek,mt6577-uart-dma", },
+	{ .compatible = "mediatek,mt6577-uart-dma", .data = &mt6577_data },
+	{ .compatible = "mediatek,mt6795-uart-dma", .data = &mt6795_data },
+	{ .compatible = "mediatek,mt6779-uart-dma", .data = &mt6779_data },
+	{ .compatible = "mediatek,mt6985-uart-dma", .data = &mt6985_data },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, mtk_uart_apdma_match);
@@ -477,7 +501,8 @@ static int mtk_uart_apdma_probe(struct platform_device *pdev)
 {
 	struct device_node *np = pdev->dev.of_node;
 	struct mtk_uart_apdmadev *mtkd;
-	int bit_mask = 32, rc;
+	const struct mtk_uart_apdma_data *data;
+	int rc;
 	struct mtk_chan *c;
 	unsigned int i;
 
@@ -492,13 +517,9 @@ static int mtk_uart_apdma_probe(struct platform_device *pdev)
 		return rc;
 	}
 
-	if (of_property_read_bool(np, "mediatek,dma-33bits"))
-		mtkd->support_33bits = true;
-
-	if (mtkd->support_33bits)
-		bit_mask = 33;
-
-	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(bit_mask));
+	data = of_device_get_match_data(&pdev->dev);
+	mtkd->support_bits = data->dma_bits;
+	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(data->dma_bits));
 	if (rc)
 		return rc;
 

-- 
2.51.0

Re: [PATCH 2/3] dmaengine: mediatek: mtk-uart-apdma: support more than 33 bits for DMA bitmask

[AngeloGioacchino Del Regno]

Il 21/09/25 13:03, Max Shevchenko via B4 Relay ha scritto:
> From: Max Shevchenko <wctrl@proton.me>
> 
> Drop mediatek,dma-33bits property and introduce a platform data with
> field representing DMA bitmask.
> 
> The reference SoCs were taken from the downstream kernel (6.6) for
> the MT6991 SoC.
> 

That's a good idea - but it doesn't work like that.

The VFF_4G_SUPPORT register really is called {RX,TX}_VFF_ADDR2 - and on all of
the newer SoCs that support more than 33 bits, this register holds the upper
X bits of the TX/RX addr, where X is (dma_bits - 32) meaning that, for example,
for MT6985 X=(36-32) -> X=4.

The downstream driver does have a reference implementation for this - and there
is no simpler way around it: you either implement it all, or you don't.

Simply put: with your code, you're not supporting more than 33 bits, because even
though you're setting the dma mask, you're never correctly using the hardware (as
in, you're never programming the additional registers to make use of that).


> Signed-off-by: Max Shevchenko <wctrl@proton.me>
> ---
>   drivers/dma/mediatek/mtk-uart-apdma.c | 47 +++++++++++++++++++++++++----------
>   1 file changed, 34 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/dma/mediatek/mtk-uart-apdma.c b/drivers/dma/mediatek/mtk-uart-apdma.c
> index 08e15177427b94246951d38a2a1d76875c1e452e..68dd3a4ee0d88fd508870a5de24ae67505023495 100644
> --- a/drivers/dma/mediatek/mtk-uart-apdma.c
> +++ b/drivers/dma/mediatek/mtk-uart-apdma.c
> @@ -42,6 +42,7 @@
>   #define VFF_EN_CLR_B		0
>   #define VFF_INT_EN_CLR_B	0
>   #define VFF_4G_SUPPORT_CLR_B	0
> +#define VFF_ORI_ADDR_BITS_NUM	32
>   
>   /*
>    * interrupt trigger level for tx
> @@ -74,10 +75,14 @@
>   #define VFF_DEBUG_STATUS	0x50
>   #define VFF_4G_SUPPORT		0x54
>   
> +struct mtk_uart_apdma_data {
> +	unsigned int dma_bits;
> +};
> +
>   struct mtk_uart_apdmadev {
>   	struct dma_device ddev;
>   	struct clk *clk;
> -	bool support_33bits;
> +	unsigned int support_bits;

You don't really need to carry support_bits... there's no real usage of that
information across the code, if not at probe time.

bool support_extended_addr; /* rename to your liking */

>   	unsigned int dma_requests;
>   };
>   
> @@ -148,7 +153,7 @@ static void mtk_uart_apdma_start_tx(struct mtk_chan *c)
>   		mtk_uart_apdma_write(c, VFF_WPT, 0);
>   		mtk_uart_apdma_write(c, VFF_INT_FLAG, VFF_TX_INT_CLR_B);
>   
> -		if (mtkd->support_33bits)
> +		if (mtkd->support_bits > VFF_ORI_ADDR_BITS_NUM)

if (mtkd->support_extended_addr)
	mtk_uart_apdma_write(c, VFF_4G_SUPPORT, upper_32_bits(d->addr);

... do the same for RX and you should be 99.9% done :-)



>   			mtk_uart_apdma_write(c, VFF_4G_SUPPORT, VFF_4G_EN_B);
>   	}
>   
> @@ -191,7 +196,7 @@ static void mtk_uart_apdma_start_rx(struct mtk_chan *c)
>   		mtk_uart_apdma_write(c, VFF_RPT, 0);
>   		mtk_uart_apdma_write(c, VFF_INT_FLAG, VFF_RX_INT_CLR_B);
>   
> -		if (mtkd->support_33bits)
> +		if (mtkd->support_bits > VFF_ORI_ADDR_BITS_NUM)
>   			mtk_uart_apdma_write(c, VFF_4G_SUPPORT, VFF_4G_EN_B);
>   	}
>   
> @@ -297,7 +302,7 @@ static int mtk_uart_apdma_alloc_chan_resources(struct dma_chan *chan)
>   		goto err_pm;
>   	}
>   
> -	if (mtkd->support_33bits)
> +	if (mtkd->support_bits > VFF_ORI_ADDR_BITS_NUM)
>   		mtk_uart_apdma_write(c, VFF_4G_SUPPORT, VFF_4G_SUPPORT_CLR_B);
>   
>   err_pm:
> @@ -467,8 +472,27 @@ static void mtk_uart_apdma_free(struct mtk_uart_apdmadev *mtkd)
>   	}
>   }
>   
> +static const struct mtk_uart_apdma_data mt6577_data = {
> +	.dma_bits = 32
> +};
> +
> +static const struct mtk_uart_apdma_data mt6795_data = {
> +	.dma_bits = 33
> +};
> +
> +static const struct mtk_uart_apdma_data mt6779_data = {
> +	.dma_bits = 34
> +};
> +
> +static const struct mtk_uart_apdma_data mt6985_data = {
> +	.dma_bits = 35
> +};
> +
>   static const struct of_device_id mtk_uart_apdma_match[] = {
> -	{ .compatible = "mediatek,mt6577-uart-dma", },
> +	{ .compatible = "mediatek,mt6577-uart-dma", .data = &mt6577_data },

What about doing, instead...

{ .compatible = "mediatek,mt6577-uart-dma", .data = (void *)32 },

> +	{ .compatible = "mediatek,mt6795-uart-dma", .data = &mt6795_data },
> +	{ .compatible = "mediatek,mt6779-uart-dma", .data = &mt6779_data },
> +	{ .compatible = "mediatek,mt6985-uart-dma", .data = &mt6985_data },
>   	{ /* sentinel */ },
>   };
>   MODULE_DEVICE_TABLE(of, mtk_uart_apdma_match);
> @@ -477,7 +501,8 @@ static int mtk_uart_apdma_probe(struct platform_device *pdev)
>   {
>   	struct device_node *np = pdev->dev.of_node;
>   	struct mtk_uart_apdmadev *mtkd;
> -	int bit_mask = 32, rc;
> +	const struct mtk_uart_apdma_data *data;
> +	int rc;
>   	struct mtk_chan *c;
>   	unsigned int i;
>   
> @@ -492,13 +517,9 @@ static int mtk_uart_apdma_probe(struct platform_device *pdev)
>   		return rc;
>   	}
>   
> -	if (of_property_read_bool(np, "mediatek,dma-33bits"))
> -		mtkd->support_33bits = true;
> -
> -	if (mtkd->support_33bits)
> -		bit_mask = 33;
> -
> -	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(bit_mask));
> +	data = of_device_get_match_data(&pdev->dev);
> +	mtkd->support_bits = data->dma_bits;

...and there you just get that single number you need, store it locally, then you
can do

mtkd->support_extended_addr = apdma_num_bits > 32;

> +	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(data->dma_bits));
>   	if (rc)
>   		return rc;
>   


Cheers,
Angelo

[PATCH 3/3] arm64: dts: mediatek: mt6795: drop mediatek,dma-33bits property

[Max Shevchenko via B4 Relay]

From: Max Shevchenko <wctrl@proton.me>

Drop the mediatek,dma-33bits property and use compatible for the
platform data instead.

Signed-off-by: Max Shevchenko <wctrl@proton.me>
---
 arch/arm64/boot/dts/mediatek/mt6795.dtsi | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index e5e269a660b11b0e94da1a1cf362ff0839f0dabf..5123316b21285cf589c0c616c0a12420f0b1ef19 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -547,8 +547,7 @@ uart1: serial@11003000 {
 		};
 
 		apdma: dma-controller@11000380 {
-			compatible = "mediatek,mt6795-uart-dma",
-				     "mediatek,mt6577-uart-dma";
+			compatible = "mediatek,mt6795-uart-dma";
 			reg = <0 0x11000380 0 0x60>,
 			      <0 0x11000400 0 0x60>,
 			      <0 0x11000480 0 0x60>,
@@ -568,7 +567,6 @@ apdma: dma-controller@11000380 {
 			dma-requests = <8>;
 			clocks = <&pericfg CLK_PERI_AP_DMA>;
 			clock-names = "apdma";
-			mediatek,dma-33bits;
 			#dma-cells = <1>;
 		};
 

-- 
2.51.0