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Thu, 16 Oct 2025 08:46:34 -0700 (PDT) From: Artem Shimko To: Eugeniy Paltsev , Vinod Koul , Philipp Zabel Cc: Artem Shimko , dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/2] dmaengine: dw-axi-dmac: add reset control support Date: Thu, 16 Oct 2025 18:46:26 +0300 Message-ID: <20251016154627.175796-3-a.shimko.dev@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251016154627.175796-1-a.shimko.dev@gmail.com> References: <20251016154627.175796-1-a.shimko.dev@gmail.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add proper reset control handling to the AXI DMA driver to ensure reliable initialization and power management. The driver now manages resets during probe, remove, and system suspend/resume operations. The implementation stores reset control in the chip structure and adds reset assert/deassert calls at the appropriate points: resets are deasserted during probe after clock acquisition, asserted during remove and error cleanup, and properly managed during suspend/resume cycles. Additionally, proper error handling is implemented for reset control operations to ensure robust behavior. This ensures the controller is properly reset during power transitions and prevents potential issues with incomplete initialization. Signed-off-by: Artem Shimko --- .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 42 ++++++++++++------- drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 1 + 2 files changed, 27 insertions(+), 16 deletions(-) diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c index 8b7cf3baf5d3..ac23e1a5e218 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c @@ -1321,6 +1321,8 @@ static int axi_dma_suspend(struct device *dev) axi_dma_irq_disable(chip); axi_dma_disable(chip); + reset_control_assert(chip->resets); + clk_disable_unprepare(chip->core_clk); clk_disable_unprepare(chip->cfgr_clk); @@ -1340,6 +1342,8 @@ static int axi_dma_resume(struct device *dev) if (ret < 0) return ret; + reset_control_deassert(chip->resets); + axi_dma_enable(chip); axi_dma_irq_enable(chip); @@ -1455,7 +1459,6 @@ static int dw_probe(struct platform_device *pdev) struct axi_dma_chip *chip; struct dw_axi_dma *dw; struct dw_axi_dma_hcfg *hdata; - struct reset_control *resets; unsigned int flags; u32 i; int ret; @@ -1487,16 +1490,6 @@ static int dw_probe(struct platform_device *pdev) return PTR_ERR(chip->apb_regs); } - if (flags & AXI_DMA_FLAG_HAS_RESETS) { - resets = devm_reset_control_array_get_exclusive(&pdev->dev); - if (IS_ERR(resets)) - return PTR_ERR(resets); - - ret = reset_control_deassert(resets); - if (ret) - return ret; - } - chip->dw->hdata->use_cfg2 = !!(flags & AXI_DMA_FLAG_USE_CFG2); chip->core_clk = devm_clk_get(chip->dev, "core-clk"); @@ -1507,18 +1500,28 @@ static int dw_probe(struct platform_device *pdev) if (IS_ERR(chip->cfgr_clk)) return PTR_ERR(chip->cfgr_clk); + chip->resets = devm_reset_control_array_get_optional_exclusive(&pdev->dev); + if (IS_ERR(chip->resets)) + return PTR_ERR(chip->resets); + + ret = reset_control_deassert(chip->resets); + if (ret) + return dev_err_probe(&pdev->dev, ret, "Failed to deassert resets\n"); + ret = parse_device_properties(chip); if (ret) - return ret; + goto err_exit; dw->chan = devm_kcalloc(chip->dev, hdata->nr_channels, sizeof(*dw->chan), GFP_KERNEL); - if (!dw->chan) - return -ENOMEM; + if (!dw->chan) { + ret = -ENOMEM; + goto err_exit; + } ret = axi_req_irqs(pdev, chip); if (ret) - return ret; + goto err_exit; INIT_LIST_HEAD(&dw->dma.channels); for (i = 0; i < hdata->nr_channels; i++) { @@ -1605,6 +1608,8 @@ static int dw_probe(struct platform_device *pdev) err_pm_disable: pm_runtime_disable(chip->dev); +err_exit: + reset_control_assert(chip->resets); return ret; } @@ -1616,9 +1621,14 @@ static void dw_remove(struct platform_device *pdev) struct axi_dma_chan *chan, *_chan; u32 i; - /* Enable clk before accessing to registers */ + /* + * The peripheral must be clocked and out of reset + * before its registers can be accessed. + */ clk_prepare_enable(chip->cfgr_clk); clk_prepare_enable(chip->core_clk); + reset_control_deassert(chip->resets); + axi_dma_irq_disable(chip); for (i = 0; i < dw->hdata->nr_channels; i++) { axi_chan_disable(&chip->dw->chan[i]); diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h index b842e6a8d90d..c74affb9f344 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h @@ -71,6 +71,7 @@ struct axi_dma_chip { struct clk *core_clk; struct clk *cfgr_clk; struct dw_axi_dma *dw; + struct reset_control *resets; }; /* LLI == Linked List Item */ -- 2.43.0