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Tue, 31 Mar 2026 11:48:06 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.18.1.7/8.18.1.7) with ESMTP id 62VBm3um010666; Tue, 31 Mar 2026 11:48:03 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 4d6qk1vegv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Mar 2026 11:48:03 +0000 (GMT) Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.18.1.12/8.18.1.12) with ESMTP id 62VBm3Ak010635; Tue, 31 Mar 2026 11:48:03 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-msavaliy-hyd.qualcomm.com [10.213.110.207]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 62VBm2x3010569 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Mar 2026 11:48:02 +0000 (GMT) Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 429934) id AF9D12579A; Tue, 31 Mar 2026 17:18:01 +0530 (+0530) From: Mukesh Kumar Savaliya To: viken.dadhaniya@oss.qualcomm.com, andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, Frank.Li@kernel.org, andersson@kernel.org, konradybcio@kernel.org, dmitry.baryshkov@oss.qualcomm.com, linmq006@gmail.com, quic_jseerapu@quicinc.com, agross@kernel.org, linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org Cc: krzysztof.kozlowski@oss.qualcomm.com, bartosz.golaszewski@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com, Mukesh Kumar Savaliya Subject: [PATCH v6 0/4] Enable multi-owner I2C support for QCOM GENI controllers Date: Tue, 31 Mar 2026 17:17:38 +0530 Message-Id: <20260331114742.2896317-1-mukesh.savaliya@oss.qualcomm.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-QCInternal: smtphost X-QCInternal: smtphost X-Authority-Analysis: v=2.4 cv=Gb0aXAXL c=1 sm=1 tr=0 ts=69cbb477 cx=c_pps a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=1yO_DMxMffipIJpN-DIA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 X-Proofpoint-GUID: OG9m2SHIQnLrLpG_pivlIyuOQVBu77dj X-Proofpoint-ORIG-GUID: OG9m2SHIQnLrLpG_pivlIyuOQVBu77dj X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzMxMDExNCBTYWx0ZWRfX3G6ilNfM1n61 Wk72lRlHOBvciVgqaYD24/528aEVtRnCorrI3WIgyXYBZvQHtd5kaR1K+Rz67XwkyI3njdchs1h M5oPU9oK6BJTSUXYpH/9cByoMBOCKtn/7BqhVa+yB4ZECx3tQfnKF4vXkNkOFLYcKSkYyHotPYr j4okLq4VaKl+Naf4SAWI1dSzPLFTdz/kDL82HoYYt+dJSzM9LvrGCrFIsRtBaSdy4QQutQNquwI GIqZeDlbyroi21iljhc2sdXi4pIDi9InwgvLkeqBmlsgO5NV8MHcqQn50Ue73NdfY9Ql1HQ30tM Q2bHMjbPQ663D7+4hRPknD1OUdUlcKmvd+3r2yu4ldhz1wBpgJVDAE6gG9NVbm1jfN2kwo0pWLL aiUdchXbWbaPRubA0iWY8g5J/QOz6fkyKrQNUgy3LP57t96kH8XENl1/hyYejiS9bAsmLZb+ITR JElAQUnZbBTa/P8UUbg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-31_02,2026-03-31_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 adultscore=0 spamscore=0 bulkscore=0 malwarescore=0 clxscore=1011 suspectscore=0 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603310114 The QUP-based GENI I2C controller driver currently assumes exclusive ownership of the controller by a single system processor. This prevents safe use of a single I2C controller by multiple system processors (e.g. APPS and a DSP) running the same or different operating systems. One practical example is an EEPROM connected to an I2C controller that needs to be accessed independently by firmware running on a DSP and by Linux running on the application processor, without causing bus-level interference during transfers. This series adds support for operating a QUP GENI I2C Serial Engine in a multi-owner configuration. Each system processor uses its own dedicated GPI instance (GPII) as the data path between the Serial Engine and the GSI DMA engine. As a result, controller sharing is supported only when the I2C controller operates in GPI mode; FIFO/CPU DMA modes are not supported for this configuration. To serialize access at the hardware level, the GPI DMA engine is used to emit lock and unlock Transfer Ring Elements (TREs) around I2C transfers. The lock is acquired before the first transfer and released after the last transfer, ensuring uninterrupted access to the controller while a processor owns it. In addition, when a controller is shared, the GENI common layer avoids placing the associated GPIOs into the pinctrl "sleep" state during runtime suspend. This prevents disruption of transfers that may still be in progress on another system processor using the same controller pins. The multi-owner behavior is enabled via a DeviceTree property, `qcom,qup-multi-owner`, on the I2C controller node. This property must be used only when the hardware configuration requires controller sharing and when GPI mode is enabled. Patch overview: 1. Document the `qcom,qup-multi-owner` DeviceTree property for GENI I2C. 2. Extend the QCOM GPI DMA driver to support lock and unlock TREs with a simplified single-field API. 3. Update the GENI common layer to keep pinctrl active for shared controllers during runtime suspend. 4. Enable multi-owner operation in the GENI I2C driver using the new DeviceTree property and GPI lock/unlock support. Signed-off-by: Mukesh Kumar Savaliya --- Link to V5 : https://lore.kernel.org/lkml/20241129144357.2008465-2-mukesh.savaliya@oss.qualcomm.com/ Changes in V6: - Addressed review feedback from Krzysztof Kozlowski and other reviewers, primarily around clarifying the feature semantics and improving the DeviceTree flag naming. - Renamed the DeviceTree property from qcom,shared-se to qcom,qup-multi-owner to better describe the multi-owner controller use case. - Updated the cover letter to clearly describe the multi-owner I2C design, the GPI-only limitation, and the role of the new qcom,qup-multi-owner flag. - Updated the DeviceTree binding documentation to reflect the new qcom,qup-multi-owner property and refined its description for clarity and correctness. - [Patch 2/4] Simplify the GPI I2C interface by replacing multiple shared SE related state flags with a single internal lock/unlock control managed entirely in the GPI driver - Suggested by Vinod Koul. - [Patch 3/4] Updated the GENI common layer to avoid selecting the pinctrl “sleep” state for multi-owner controllers, preventing disruption of transfers initiated by another system processor during runtime suspend. - [Patch 4/4] Updated the GENI I2C driver to: - Detect the qcom,qup-multi-owner DeviceTree property. - Mark the underlying serial engine as shared. - Request GPI lock and unlock TRE sequencing around I2C transfers using the simplified single field API. - Clarified commit messages across all patches to avoid ambiguous terminology (such as “subsystem”), expand abbreviations, and better explain functional requirements rather than optimizations. - Updated copyright headers across all files wherever applicable. - Renamed variable shared_geni_se to multi_owner to match the DT property naming. - Changed dev_err(print_log) during probe() to dev_err_probe(). --- Mukesh Kumar Savaliya (4): dt-bindings: i2c: qcom,i2c-geni: Document multi-owner controller support dmaengine: qcom: gpi: Add lock/unlock TREs for multi-owner I2C transfers soc: qcom: geni-se: Keep pinctrl active for multi-owner controllers i2c: qcom-geni: Support multi-owner controllers in GPI mode .../bindings/i2c/qcom,i2c-geni-qcom.yaml | 7 +++ drivers/dma/qcom/gpi.c | 44 ++++++++++++++++++- drivers/i2c/busses/i2c-qcom-geni.c | 27 +++++++++++- drivers/soc/qcom/qcom-geni-se.c | 15 +++++-- include/linux/dma/qcom-gpi-dma.h | 18 ++++++++ include/linux/soc/qcom/geni-se.h | 2 + 6 files changed, 107 insertions(+), 6 deletions(-) -- 2.25.1