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From: sashiko-bot@kernel.org
To: "Jun Guo" <jun.guo@cixtech.com>
Cc: robh@kernel.org, vkoul@kernel.org, dmaengine@vger.kernel.org,
	devicetree@vger.kernel.org, Frank.Li@kernel.org,
	conor+dt@kernel.org
Subject: Re: [PATCH v7 1/2] dmaengine: arm-dma350: enable ANYCH interrupt for shared IRQ wiring
Date: Thu, 21 May 2026 07:52:53 +0000	[thread overview]
Message-ID: <20260521075253.B88E71F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260521072924.3000282-2-jun.guo@cixtech.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Enabling the global ANYCH interrupt before clearing channel states and handling error paths can cause spurious interrupt storms and break shared IRQ lines.
--

commit 0bf9d17ebbd8be17166134ed8865c553f2b5eec7
Author: Jun Guo <jun.guo@cixtech.com>

dmaengine: arm-dma350: enable ANYCH interrupt for shared IRQ wiring

This commit enables DMANSECCTRL.INTREN_ANYCHINTR during probe so that channel
interrupts are propagated when integrators wire DMA-350 channels onto a shared
IRQ line.

> diff --git a/drivers/dma/arm-dma350.c b/drivers/dma/arm-dma350.c
> index 84220fa83029d..09403aca8bb06 100644
> --- a/drivers/dma/arm-dma350.c
> +++ b/drivers/dma/arm-dma350.c

[ ... ]

> @@ -582,6 +587,10 @@ static int d350_probe(struct platform_device *pdev)
>  	dmac->dma.device_issue_pending = d350_issue_pending;
>  	INIT_LIST_HEAD(&dmac->dma.channels);
>  
> +	reg = readl_relaxed(base + DMANSECCTRL + NSEC_CTRL);
> +	writel_relaxed(reg | INTREN_ANYCHINTR_EN,
> +		       base + DMANSECCTRL + NSEC_CTRL);
> +

[Severity: High]
Will enabling INTREN_ANYCHINTR_EN here, before clearing the individual channel
states, potentially cause an interrupt storm on shared IRQ lines?

If a bootloader left a channel with a pending interrupt, this will immediately
assert the shared interrupt line before the DMA driver has registered its IRQ
handler or cleared the channel state in the loop below.

Additionally, if the probe fails midway (for instance, if platform_get_irq
returns an error for a channel):

drivers/dma/arm-dma350.c:d350_probe() {
        ...
        dch->irq = platform_get_irq(pdev, i);
        if (dch->irq < 0)
            return dev_err_probe(dev, dch->irq, ...);
}

Does this error path leave the global ANYCH interrupt enabled without sending
CH_CMD_CLEAR to the remaining channels? Any uncleared pending interrupt on
those remaining channels could permanently assert the shared IRQ line,
eventually causing the kernel to disable the shared IRQ entirely.

>  	/* Would be nice to have per-channel caps for this... */
>  	memset = true;
>  	for (int i = 0; i < nchan; i++) {

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260521072924.3000282-1-jun.guo@cixtech.com?part=1

  reply	other threads:[~2026-05-21  7:52 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-21  7:29 [PATCH v7 0/2] dmaengine: arm-dma350: handle shared channel IRQ wiring on sky1 Jun Guo
2026-05-21  7:29 ` [PATCH v7 1/2] dmaengine: arm-dma350: enable ANYCH interrupt for shared IRQ wiring Jun Guo
2026-05-21  7:52   ` sashiko-bot [this message]
2026-05-21  7:29 ` [PATCH v7 2/2] arm64: dts: cix: add sky1 DMA-350 node with channel IRQ entries Jun Guo

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