Re: [PATCH v2 1/2] dmaengine: dw-axi-dmac: drop redundant DMAC enable in block start

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Concurrent transfers can race on global APB registers due to lack of a global lock in `dw_axi_dma_set_byte_halfword`.
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commit b6ec2512e872c5f388866aa7fdbd27c4bf168a25
Author: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>

dmaengine: dw-axi-dmac: drop redundant DMAC enable in block start

This commit removes an unnecessary call to axi_dma_enable() in
axi_chan_block_xfer_start(), as the controller is already enabled.
This avoids repeated no-op programming and keeps the transfer start
path clean.

> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> index 4d53f077e9d25..f7a50f470461c 100644
> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> @@ -437,8 +437,6 @@ static void axi_chan_block_xfer_start(struct axi_dma_chan *chan,
>  		return;
>  	}
>  
> -	axi_dma_enable(chan->chip);
> -
>  	config.dst_multblk_type = DWAXIDMAC_MBLK_TYPE_LL;
>  	config.src_multblk_type = DWAXIDMAC_MBLK_TYPE_LL;
>  	config.tt_fc = DWAXIDMAC_TT_FC_MEM_TO_MEM_DMAC;

[Severity: High]
This is a pre-existing issue, but can concurrent transfers race on the
global APB registers during this setup phase?

When this function executes for the DMA_MEM_TO_DEV direction, it calls
dw_axi_dma_set_byte_halfword(). That function performs read-modify-write
operations on the global DMAC_APB_BYTE_WR_CH_EN or 
DMAC_APB_HALFWORD_WR_CH_EN registers, which contain configuration bits
for all channels.

Since the locking in these paths typically relies on the per-channel
chan->vc.lock, concurrent calls on different channels could interleave.
Would this lead to one channel's configuration bit being silently
overwritten and lost, potentially resulting in incorrectly configured
transfers or memory corruption?

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Sashiko AI review · https://sashiko.dev/#/patchset/cover.1779688569.git.tze.yee.ng@altera.com?part=1