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Thu, 11 Jun 2026 14:07:41 -0700 (PDT) Received: from ryzen ([2601:644:8000:5b5d:6d3a:64fc:4ee8:9cc3]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c411d79289sm389995ad.14.2026.06.11.14.07.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jun 2026 14:07:40 -0700 (PDT) From: Rosen Penev To: dmaengine@vger.kernel.org Cc: Vinod Koul , Frank Li , Thomas Petazzoni , Gregory CLEMENT , Marcin Wojtas , Rob Herring , linux-kernel@vger.kernel.org (open list) Subject: [PATCHv2 1/9] dmaengine: mv_xor: initialize chan state before requesting IRQ Date: Thu, 11 Jun 2026 14:07:13 -0700 Message-ID: <20260611210721.81979-2-rosenp@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260611210721.81979-1-rosenp@gmail.com> References: <20260611210721.81979-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit In mv_xor_channel_add(), the IRQ is requested and unmasked before the channel's spinlock, descriptor lists, and cookie state are initialized. If an interrupt fires immediately (e.g. from a shared IRQ or previous bind/unbind cycle), the handler schedules the tasklet, which then accesses the uninitialized spinlock and lists in mv_chan_slot_cleanup(), resulting in undefined behavior. Fix by moving spin_lock_init(), INIT_LIST_HEAD(), dma_cookie_init(), and tasklet_setup() to immediately follow the basic struct field initialization, before any DMA mappings or IRQ registration. Assisted-by: opencode:big-pickle Signed-off-by: Rosen Penev --- drivers/dma/mv_xor.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c index 25ed61f1b089..93a8e9f7c529 100644 --- a/drivers/dma/mv_xor.c +++ b/drivers/dma/mv_xor.c @@ -1054,6 +1054,18 @@ mv_xor_channel_add(struct mv_xor_device *xordev, dma_dev->dev = &pdev->dev; mv_chan->xordev = xordev; + spin_lock_init(&mv_chan->lock); + INIT_LIST_HEAD(&mv_chan->chain); + INIT_LIST_HEAD(&mv_chan->completed_slots); + INIT_LIST_HEAD(&mv_chan->free_slots); + INIT_LIST_HEAD(&mv_chan->allocated_slots); + mv_chan->dmachan.device = dma_dev; + dma_cookie_init(&mv_chan->dmachan); + + mv_chan->mmr_base = xordev->xor_base; + mv_chan->mmr_high_base = xordev->xor_high_base; + tasklet_setup(&mv_chan->irq_tasklet, mv_xor_tasklet); + /* * These source and destination dummy buffers are used to implement * a DMA_INTERRUPT operation as a minimum-sized XOR operation. @@ -1105,10 +1117,6 @@ mv_xor_channel_add(struct mv_xor_device *xordev, dma_dev->device_prep_dma_xor = mv_xor_prep_dma_xor; } - mv_chan->mmr_base = xordev->xor_base; - mv_chan->mmr_high_base = xordev->xor_high_base; - tasklet_setup(&mv_chan->irq_tasklet, mv_xor_tasklet); - /* clear errors before enabling interrupts */ mv_chan_clear_err_status(mv_chan); @@ -1124,14 +1132,6 @@ mv_xor_channel_add(struct mv_xor_device *xordev, else mv_chan_set_mode(mv_chan, XOR_OPERATION_MODE_XOR); - spin_lock_init(&mv_chan->lock); - INIT_LIST_HEAD(&mv_chan->chain); - INIT_LIST_HEAD(&mv_chan->completed_slots); - INIT_LIST_HEAD(&mv_chan->free_slots); - INIT_LIST_HEAD(&mv_chan->allocated_slots); - mv_chan->dmachan.device = dma_dev; - dma_cookie_init(&mv_chan->dmachan); - list_add_tail(&mv_chan->dmachan.device_node, &dma_dev->channels); if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) { -- 2.54.0