From: Logan Gunthorpe <logang@deltatee.com>
To: dmaengine@vger.kernel.org, Vinod Koul <vkoul@kernel.org>
Cc: "Frank Li" <Frank.li@nxp.com>,
"Christoph Hellwig" <hch@infradead.org>,
"Christophe Jaillet" <christophe.jaillet@wanadoo.fr>,
"Dave Jiang" <dave.jiang@intel.com>,
"Thomas Weißschuh" <linux@weissschuh.net>,
"Kelvin Cao" <kelvin.cao@microchip.com>,
"Logan Gunthorpe" <logang@deltatee.com>
Subject: [PATCH v1 3/5] dmaengine: switchtec-dma: Add config sysfs attributes
Date: Tue, 7 Jul 2026 10:20:43 -0600 [thread overview]
Message-ID: <20260707162045.23910-4-logang@deltatee.com> (raw)
In-Reply-To: <20260707162045.23910-1-logang@deltatee.com>
Add sysfs configuration options for switchtec-dma devices.
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
---
drivers/dma/switchtec_dma.c | 141 ++++++++++++++++++++++++++++++++++++
1 file changed, 141 insertions(+)
diff --git a/drivers/dma/switchtec_dma.c b/drivers/dma/switchtec_dma.c
index 3ef928640615..4841134bd7b8 100644
--- a/drivers/dma/switchtec_dma.c
+++ b/drivers/dma/switchtec_dma.c
@@ -1027,6 +1027,145 @@ static int switchtec_dma_alloc_chan_resources(struct dma_chan *chan)
return SWITCHTEC_DMA_SQ_SIZE;
}
+static __always_inline ssize_t perf_cfg_show(struct dma_chan *chan, char *page,
+ unsigned int mask)
+{
+ struct switchtec_dma_chan *swdma_chan =
+ container_of(chan, struct switchtec_dma_chan, dma_chan);
+ struct chan_fw_regs __iomem *chan_fw = swdma_chan->mmio_chan_fw;
+ u32 perf_cfg;
+ int value;
+
+ rcu_read_lock();
+ if (!rcu_dereference(swdma_chan->swdma_dev->pdev)) {
+ rcu_read_unlock();
+ return -ENODEV;
+ }
+
+ perf_cfg = readl(&chan_fw->perf_cfg);
+ value = field_get(mask, perf_cfg);
+
+ rcu_read_unlock();
+ return sprintf(page, "0x%x\n", value);
+}
+
+static __always_inline ssize_t perf_cfg_store(struct dma_chan *chan,
+ const char *page, size_t count, unsigned int mask)
+{
+ struct switchtec_dma_chan *swdma_chan =
+ container_of(chan, struct switchtec_dma_chan, dma_chan);
+ struct chan_fw_regs __iomem *chan_fw = swdma_chan->mmio_chan_fw;
+ ssize_t ret = count;
+ u32 perf_cfg;
+ int value;
+
+ if (kstrtoint(page, 0, &value) < 0)
+ return -EINVAL;
+
+ if (value < 0 || value > field_max(mask))
+ return -EINVAL;
+
+ rcu_read_lock();
+ if (!rcu_dereference(swdma_chan->swdma_dev->pdev)) {
+ ret = -ENODEV;
+ goto err_unlock;
+ }
+
+ if (chan->client_count)
+ goto err_unlock;
+
+ perf_cfg = readl(&chan_fw->perf_cfg);
+ perf_cfg = (perf_cfg & ~mask) | field_prep(mask, value);
+ writel(perf_cfg, &chan_fw->perf_cfg);
+
+err_unlock:
+ rcu_read_unlock();
+ return ret;
+}
+
+static ssize_t burst_scale_show(struct dma_chan *chan, char *page)
+{
+ return perf_cfg_show(chan, page, PERF_BURST_SCALE_MASK);
+}
+
+static ssize_t burst_scale_store(struct dma_chan *chan, const char *page,
+ size_t count)
+{
+ return perf_cfg_store(chan, page, count, PERF_BURST_SCALE_MASK);
+}
+static struct dma_chan_sysfs_entry burst_scale_attr = __ATTR_RW(burst_scale);
+
+static ssize_t mrrs_show(struct dma_chan *chan, char *page)
+{
+ return perf_cfg_show(chan, page, PERF_MRRS_MASK);
+}
+
+static ssize_t mrrs_store(struct dma_chan *chan, const char *page,
+ size_t count)
+{
+ return perf_cfg_store(chan, page, count, PERF_MRRS_MASK);
+}
+static struct dma_chan_sysfs_entry mrrs_attr = __ATTR_RW(mrrs);
+
+static ssize_t interval_show(struct dma_chan *chan, char *page)
+{
+ return perf_cfg_show(chan, page, PERF_INTERVAL_MASK);
+}
+
+static ssize_t interval_store(struct dma_chan *chan, const char *page,
+ size_t count)
+{
+ return perf_cfg_store(chan, page, count, PERF_INTERVAL_MASK);
+}
+static struct dma_chan_sysfs_entry interval_attr = __ATTR_RW(interval);
+
+static ssize_t burst_size_show(struct dma_chan *chan, char *page)
+{
+ return perf_cfg_show(chan, page, PERF_BURST_SIZE_MASK);
+}
+
+static ssize_t burst_size_store(struct dma_chan *chan, const char *page,
+ size_t count)
+{
+ return perf_cfg_store(chan, page, count, PERF_BURST_SIZE_MASK);
+}
+static struct dma_chan_sysfs_entry burst_size_attr = __ATTR_RW(burst_size);
+
+static ssize_t arb_weight_show(struct dma_chan *chan, char *page)
+{
+ return perf_cfg_show(chan, page, PERF_ARB_WEIGHT_MASK);
+}
+
+static ssize_t arb_weight_store(struct dma_chan *chan, const char *page,
+ size_t count)
+{
+ return perf_cfg_store(chan, page, count, PERF_ARB_WEIGHT_MASK);
+}
+static struct dma_chan_sysfs_entry arb_weight_attr = __ATTR_RW(arb_weight);
+
+static struct attribute *switchtec_config_attrs[] = {
+ &burst_scale_attr.attr,
+ &mrrs_attr.attr,
+ &interval_attr.attr,
+ &burst_size_attr.attr,
+ &arb_weight_attr.attr,
+ NULL
+};
+
+static struct attribute_group switchtec_config_group = {
+ .attrs = switchtec_config_attrs,
+};
+
+static const struct attribute_group *switchtec_groups[] = {
+ &switchtec_config_group,
+ NULL,
+};
+
+static const struct kobj_type switchtec_ktype = {
+ .sysfs_ops = &dma_chan_sysfs_ops,
+ .default_groups = switchtec_groups,
+};
+
static void switchtec_dma_free_chan_resources(struct dma_chan *chan)
{
struct switchtec_dma_chan *swdma_chan =
@@ -1286,6 +1425,8 @@ static int switchtec_dma_create(struct pci_dev *pdev)
goto err_chans_release_exit;
}
+ dma_chan_kobject_add(dma, &switchtec_ktype, "switchtec");
+
pci_dbg(pdev, "Channel count: %d\n", chan_cnt);
list_for_each_entry(chan, &dma->channels, device_node)
--
2.47.3
next prev parent reply other threads:[~2026-07-07 16:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-07 16:20 [PATCH v1 0/5] Add sysfs interface to switchtec-dma Logan Gunthorpe
2026-07-07 16:20 ` [PATCH v1 1/5] dmaengine: add support for custom per-channel sysfs attributes Logan Gunthorpe
2026-07-07 16:54 ` sashiko-bot
2026-07-07 16:20 ` [PATCH v1 2/5] dmaengine: ioatdma: use common channel sysfs attribute creation Logan Gunthorpe
2026-07-07 16:48 ` Dave Jiang
2026-07-07 16:59 ` sashiko-bot
2026-07-07 16:20 ` Logan Gunthorpe [this message]
2026-07-07 16:55 ` [PATCH v1 3/5] dmaengine: switchtec-dma: Add config sysfs attributes sashiko-bot
2026-07-07 16:20 ` [PATCH v1 4/5] dmaengine: switchtec-dma: Add pmon " Logan Gunthorpe
2026-07-07 16:58 ` sashiko-bot
2026-07-07 16:20 ` [PATCH v1 5/5] dmaengine: switchtec-dma: Add PCI1008 device ID Logan Gunthorpe
2026-07-07 16:53 ` sashiko-bot
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