DMA Engine development
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From: sashiko-bot@kernel.org
To: "Koichiro Den" <den@valinux.co.jp>
Cc: dmaengine@vger.kernel.org, vkoul@kernel.org, Frank.Li@kernel.org
Subject: Re: [PATCH 1/7] dmaengine: dw-edma: Fix HDMA channel status register access
Date: Fri, 10 Jul 2026 08:19:09 +0000	[thread overview]
Message-ID: <20260710081910.5226C1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260710080903.2392888-2-den@valinux.co.jp>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Hardware lifecycle mismanagement allows memory corruption via continuing DMA transfers after `dmaengine_terminate_all`.
--

--- Patch [1]: [PATCH 1/7] dmaengine: dw-edma: Fix HDMA channel status register access ---
commit 3731db5499eb78e6e698a87ead1446781041195a
Author: Koichiro Den <den@valinux.co.jp>

dmaengine: dw-edma: Fix HDMA channel status register access
    
This commit fixes the argument order for GET_CH_32() in
dw_hdma_v0_core_ch_status(). The previous incorrect order of passing the
channel ID and direction caused the status callback to read from the wrong
HDMA channel status register.

> diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c
> index 632abb8b481cf..2beec876b1842 100644
> --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c
> +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c
> @@ -79,7 +79,7 @@ static enum dma_status dw_hdma_v0_core_ch_status(struct dw_edma_chan *chan)
>  	u32 tmp;
>  
>  	tmp = FIELD_GET(HDMA_V0_CH_STATUS_MASK,
> -			GET_CH_32(dw, chan->id, chan->dir, ch_stat));
> +			GET_CH_32(dw, chan->dir, chan->id, ch_stat));

[Severity: High]
This is a pre-existing issue, but I noticed a potential hardware lifecycle
mismanagement in dw_edma_device_terminate_all() which relies on this status
check.

When dmaengine_terminate_all() is called:

drivers/dma/dw-edma/dw-edma-core.c:dw_edma_device_terminate_all() {
    ...
	} else if (dw_edma_core_ch_status(chan) == DMA_COMPLETE) {
    ...
	} else if (chan->request > EDMA_REQ_PAUSE) {
		err = -EPERM;
	} else {
		chan->request = EDMA_REQ_STOP;
	}

	return err;
}

The function returns success after merely setting chan->request = EDMA_REQ_STOP,
without issuing hardware commands to abort the active transfer.

Since the hardware continues reading or writing memory in the background, if a
DMA client unmaps or frees the memory based on this function's successful
return, could the DMA hardware access unmapped or reallocated memory, leading
to memory corruption? 

For cyclic transfers, does this cause the hardware to loop indefinitely?

>  
>  	if (tmp == 1)
>  		return DMA_IN_PROGRESS;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260710080903.2392888-1-den@valinux.co.jp?part=1

  reply	other threads:[~2026-07-10  8:19 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-10  8:08 [PATCH 0/7] dmaengine: dw-edma: Fixes and interrupt-path groundwork Koichiro Den
2026-07-10  8:08 ` [PATCH 1/7] dmaengine: dw-edma: Fix HDMA channel status register access Koichiro Den
2026-07-10  8:19   ` sashiko-bot [this message]
2026-07-10 21:26   ` Frank Li
2026-07-13  5:17     ` Koichiro Den
2026-07-10  8:08 ` [PATCH 2/7] dmaengine: dw-edma: Terminate STOP requests without callbacks Koichiro Den
2026-07-10  8:26   ` sashiko-bot
2026-07-11 14:27   ` Frank Li
2026-07-10  8:08 ` [PATCH 3/7] dmaengine: dw-edma: Clean up vchan descriptors on termination Koichiro Den
2026-07-10  8:24   ` sashiko-bot
2026-07-11 14:39   ` Frank Li
2026-07-10  8:09 ` [PATCH 4/7] dmaengine: dw-edma: Serialize channel state checks Koichiro Den
2026-07-10  8:28   ` sashiko-bot
2026-07-10  8:09 ` [PATCH 5/7] dmaengine: dw-edma-pcie: Drop redundant pci_free_irq_vectors() Koichiro Den
2026-07-11 14:41   ` Frank Li
2026-07-10  8:09 ` [PATCH 6/7] dmaengine: dw-edma: Snapshot the v0 interrupt status once per handler pass Koichiro Den
2026-07-11 14:44   ` Frank Li
2026-07-10  8:09 ` [PATCH 7/7] dmaengine: dw-edma: Defer channel IRQ handling to workqueue Koichiro Den
2026-07-10  8:24   ` sashiko-bot
2026-07-11 14:55   ` Frank Li

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