From: sashiko-bot@kernel.org
To: "Bartosz Golaszewski" <bartosz.golaszewski@oss.qualcomm.com>
Cc: Frank.Li@kernel.org, vkoul@kernel.org, dmaengine@vger.kernel.org
Subject: Re: [PATCH v22 12/14] crypto: qce - Map crypto memory for DMA
Date: Fri, 17 Jul 2026 09:02:46 +0000 [thread overview]
Message-ID: <20260717090246.997791F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260717-qcom-qce-cmd-descr-v22-12-ff0d18b27246@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
New issues:
- [High] The workqueue cancellation devres action is registered too early, leading to use of a destroyed mutex and freed DMA channels during teardown.
- [Medium] The DMA unmap action `qce_crypto_unmap_dma` is registered in the wrong devres order, causing it to execute before DMA is terminated.
Pre-existing issues:
- [High] Incorrect algorithm unregistration on the failure path in devm_qce_register_algs() causes a resource leak and potential use-after-free.
--
--- Patch [12]: [PATCH v22 12/14] crypto: qce - Map crypto memory for DMA ---
commit d6ac886b4f29b8b9e4e4a48b6b23f8358b593923
Author: Bartosz Golaszewski <brgl@kernel.org>
crypto: qce - Map crypto memory for DMA
As the first step in converting the driver to using DMA for register
I/O, let's map the crypto memory range.
> diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c
> index aa4a0b1774908..4031b4516d651 100644
> --- a/drivers/crypto/qce/core.c
> +++ b/drivers/crypto/qce/core.c
> @@ -191,10 +191,19 @@ static void qce_cancel_work(void *data)
> cancel_work_sync(work);
> }
[Severity: High]
Is the workqueue cancellation devres action registered too early?
Looking at qce_crypto_probe, devm_add_action_or_reset for qce_cancel_work is
registered before devm_qce_dma_request and devm_mutex_init. Because devres
actions execute in LIFO order on teardown, this means the mutex is poisoned
and DMA channels are released before cancel_work_sync is called.
If qce_req_done_work executes concurrently during unbind or probe failure,
could this lead to locking a destroyed mutex and issuing commands on freed
DMA channels?
[ ... ]
> @@ -254,6 +263,18 @@ static int qce_crypto_probe(struct platform_device *pdev)
> qce->async_req_enqueue = qce_async_request_enqueue;
> qce->async_req_done = qce_async_request_done;
>
> + qce->dma_size = resource_size(res);
> + qce->base_dma = dma_map_resource(dev, res->start, qce->dma_size,
> + DMA_BIDIRECTIONAL, 0);
> + qce->base_phys = res->start;
> + ret = dma_mapping_error(dev, qce->base_dma);
> + if (ret)
> + return ret;
> +
> + ret = devm_add_action_or_reset(qce->dev, qce_crypto_unmap_dma, qce);
[Severity: Medium]
Will this DMA unmap action execute before the DMA engine is terminated?
During teardown, the devres LIFO ordering will cause qce_crypto_unmap_dma
to run before qce_dma_terminate, which was registered earlier in
devm_qce_dma_request. Can this unmap the crypto memory from the IOMMU
while the BAM DMA engine is still active, potentially causing an IOMMU fault?
> + if (ret)
> + return ret;
> +
> return devm_qce_register_algs(qce);
[Severity: High]
This is a pre-existing issue, but does the error rollback loop in
devm_qce_register_algs fail to unregister the correct algorithms?
If ops->register_algs() fails, the rollback iterates backwards through j:
drivers/crypto/qce/core.c:devm_qce_register_algs() {
...
for (i = 0; i < ARRAY_SIZE(qce_ops); i++) {
ops = qce_ops[i];
ret = ops->register_algs(qce);
if (ret) {
for (j = i - 1; j >= 0; j--)
ops->unregister_algs(qce);
return ret;
}
}
...
}
Because this calls ops->unregister_algs(qce) instead of using
qce_ops[j]->unregister_algs(qce), won't it repeatedly unregister the
currently failed algorithm and leave the previously successful algorithms
active?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260717-qcom-qce-cmd-descr-v22-0-ff0d18b27246@oss.qualcomm.com?part=12
next prev parent reply other threads:[~2026-07-17 9:02 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-17 8:36 [PATCH v22 00/14] crypto/dmaengine: qce: introduce BAM locking and use DMA for register I/O Bartosz Golaszewski
2026-07-17 8:36 ` [PATCH v22 01/14] dmaengine: constify struct dma_descriptor_metadata_ops Bartosz Golaszewski
2026-07-17 8:36 ` [PATCH v22 02/14] dmaengine: qcom: bam_dma: free interrupt before the clock in error path Bartosz Golaszewski
2026-07-17 8:50 ` sashiko-bot
2026-07-17 8:36 ` [PATCH v22 03/14] dmaengine: qcom: bam_dma: convert tasklet to a BH workqueue Bartosz Golaszewski
2026-07-17 8:53 ` sashiko-bot
2026-07-17 8:36 ` [PATCH v22 04/14] dmaengine: qcom: bam_dma: Extend the driver's device match data Bartosz Golaszewski
2026-07-17 8:36 ` [PATCH v22 05/14] dmaengine: qcom: bam_dma: Add pipe_lock_supported flag support Bartosz Golaszewski
2026-07-17 8:36 ` [PATCH v22 06/14] dmaengine: qcom: bam_dma: add support for BAM locking Bartosz Golaszewski
2026-07-17 8:51 ` sashiko-bot
2026-07-17 8:36 ` [PATCH v22 07/14] crypto: qce - Cancel work on device detach Bartosz Golaszewski
2026-07-17 8:56 ` sashiko-bot
2026-07-17 8:36 ` [PATCH v22 08/14] crypto: qce - Include algapi.h in the core.h header Bartosz Golaszewski
2026-07-17 8:36 ` [PATCH v22 09/14] crypto: qce - Remove unused ignore_buf Bartosz Golaszewski
2026-07-17 8:54 ` sashiko-bot
2026-07-17 8:36 ` [PATCH v22 10/14] crypto: qce - Simplify arguments of devm_qce_dma_request() Bartosz Golaszewski
2026-07-17 8:36 ` [PATCH v22 11/14] crypto: qce - Use existing devres APIs in devm_qce_dma_request() Bartosz Golaszewski
2026-07-17 9:05 ` sashiko-bot
2026-07-17 8:36 ` [PATCH v22 12/14] crypto: qce - Map crypto memory for DMA Bartosz Golaszewski
2026-07-17 9:02 ` sashiko-bot [this message]
2026-07-17 8:36 ` [PATCH v22 13/14] crypto: qce - Add BAM DMA support for crypto register I/O Bartosz Golaszewski
2026-07-17 9:08 ` sashiko-bot
2026-07-17 8:36 ` [PATCH v22 14/14] crypto: qce - Communicate the base physical address to the dmaengine Bartosz Golaszewski
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