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From: sashiko-bot@kernel.org
To: "Bartosz Golaszewski" <bartosz.golaszewski@oss.qualcomm.com>
Cc: vkoul@kernel.org, Frank.Li@kernel.org, dmaengine@vger.kernel.org
Subject: Re: [PATCH v24 03/14] dmaengine: qcom: bam_dma: convert tasklet to a BH workqueue
Date: Thu, 23 Jul 2026 17:25:44 +0000	[thread overview]
Message-ID: <20260723172546.640E31F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260723-qcom-qce-cmd-descr-v24-3-4f87bb4d9938@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

Pre-existing issues:
- [Critical] Hardware register accesses occur on a suspended, unclocked device during module removal and channel termination.
- [High] Unprotected hardware access in the interrupt handler before acquiring a PM runtime reference.
- [High] PM usage counter leak on pm_runtime_get_sync() error paths permanently breaks runtime PM.
--

--- Patch [3]: [PATCH v24 03/14] dmaengine: qcom: bam_dma: convert tasklet to a BH workqueue ---
commit 08e5256f7c45114b9d7ecdee4105f52f7321782a
Author: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Subject: dmaengine: qcom: bam_dma: convert tasklet to a BH workqueue

This patch converts the BAM DMA driver from using legacy tasklets to using
the high-priority variant of the BH workqueue for starting DMA transactions.

> --- a/drivers/dma/qcom/bam_dma.c
> +++ b/drivers/dma/qcom/bam_dma.c
> @@ -922,9 +923,9 @@ static irqreturn_t bam_dma_irq(int irq, void *data)
>  
>  	srcs |= process_channel_irqs(bdev);

[Severity: High]
This isn't a bug introduced by this patch, but does process_channel_irqs()
read hardware registers before pm_runtime_get_sync() guarantees the clock
is enabled?

If a spurious interrupt or hardware glitch causes the IRQ handler to fire
while the device is in a runtime-suspended state, this unprotected read
could cause a fatal NoC error.

> -	/* kick off tasklet to start next dma transfer */
> +	/* kick off the work queue to start next dma transfer */
>  	if (srcs & P_IRQ)
> -		tasklet_schedule(&bdev->task);
> +		queue_work(system_bh_highpri_wq, &bdev->work);
>  
>  	ret = pm_runtime_get_sync(bdev->dev);
>  	if (ret < 0)

[Severity: High]
This is also a pre-existing issue, but if pm_runtime_get_sync() fails here
and returns a negative value, the function returns IRQ_NONE without dropping
the PM usage counter.

Since pm_runtime_get_sync() increments the usage counter even on failure,
should there be a call to pm_runtime_put_noidle() on this error path to
prevent a permanent PM usage counter leak? (A similar pattern also exists in
bam_start_dma(), bam_pause(), and bam_resume()).

[ ... ]

> @@ -1424,7 +1424,7 @@ static void bam_dma_remove(struct platform_device *pdev)
>  			    bdev->channels[i].fifo_phys);
>  	}
>  
> -	tasklet_kill(&bdev->task);
> +	cancel_work_sync(&bdev->work);
>  
>  	clk_disable_unprepare(bdev->bamclk);
>  }

[Severity: Critical]
This is a pre-existing issue, but in bam_dma_remove(), is it possible for an
unclocked hardware write to BAM_IRQ_SRCS_MSK_EE to occur immediately after
the clock is disabled by pm_runtime_force_suspend() higher up in this
function?

Additionally, bam_dma_terminate_all() is called nearby, which may also
perform unclocked hardware writes via bam_chan_init_hw() if there are
pending descriptors.

Could this lead to a synchronous external abort or NoC error during module
removal or unbinding?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260723-qcom-qce-cmd-descr-v24-0-4f87bb4d9938@oss.qualcomm.com?part=3

  reply	other threads:[~2026-07-23 17:25 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-23 17:09 [PATCH v24 00/14] crypto/dmaengine: qce: introduce BAM locking and use DMA for register I/O Bartosz Golaszewski
2026-07-23 17:09 ` [PATCH v24 01/14] dmaengine: constify struct dma_descriptor_metadata_ops Bartosz Golaszewski
2026-07-23 17:09 ` [PATCH v24 02/14] dmaengine: qcom: bam_dma: free interrupt before the clock in error path Bartosz Golaszewski
2026-07-23 17:26   ` sashiko-bot
2026-07-23 17:09 ` [PATCH v24 03/14] dmaengine: qcom: bam_dma: convert tasklet to a BH workqueue Bartosz Golaszewski
2026-07-23 17:25   ` sashiko-bot [this message]
2026-07-23 17:09 ` [PATCH v24 04/14] dmaengine: qcom: bam_dma: Extend the driver's device match data Bartosz Golaszewski
2026-07-23 17:09 ` [PATCH v24 05/14] dmaengine: qcom: bam_dma: Add pipe_lock_supported flag support Bartosz Golaszewski
2026-07-23 17:09 ` [PATCH v24 06/14] dmaengine: qcom: bam_dma: add support for BAM locking Bartosz Golaszewski
2026-07-23 17:28   ` sashiko-bot
2026-07-23 17:09 ` [PATCH v24 07/14] crypto: qce - Cancel work on device detach Bartosz Golaszewski
2026-07-23 17:23   ` sashiko-bot
2026-07-23 17:09 ` [PATCH v24 08/14] crypto: qce - Include algapi.h in the core.h header Bartosz Golaszewski
2026-07-23 17:09 ` [PATCH v24 09/14] crypto: qce - Remove unused ignore_buf Bartosz Golaszewski
2026-07-23 17:09 ` [PATCH v24 10/14] crypto: qce - Simplify arguments of devm_qce_dma_request() Bartosz Golaszewski
2026-07-23 17:09 ` [PATCH v24 11/14] crypto: qce - Use existing devres APIs in devm_qce_dma_request() Bartosz Golaszewski
2026-07-23 17:22   ` sashiko-bot
2026-07-23 17:09 ` [PATCH v24 12/14] crypto: qce - Map crypto memory for DMA Bartosz Golaszewski
2026-07-23 17:23   ` sashiko-bot
2026-07-23 17:09 ` [PATCH v24 13/14] crypto: qce - Add BAM DMA support for crypto register I/O Bartosz Golaszewski
2026-07-23 17:32   ` sashiko-bot
2026-07-23 17:09 ` [PATCH v24 14/14] crypto: qce - Communicate the base physical address to the dmaengine Bartosz Golaszewski
2026-07-23 17:27 ` [PATCH v24 00/14] crypto/dmaengine: qce: introduce BAM locking and use DMA for register I/O Eric Biggers

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