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On i.MX95, eDMA channels are assigned individual stream IDs by the SMMU, with paired channels (e.g. TX/RX) sharing the same SID. The standard iommu-map devicetree property is used to describe this mapping, following the same pattern used by PCI controllers. Patch 1 adds the iommu-map property to the fsl,edma dt-binding schema and includes an fsl,imx95-edma5 example demonstrating per-channel mappings. Patch 2 implements the driver support: at probe time, per-channel devices are prepared with DMA masks and bus pointers; at xlate time, the channel index is looked up in iommu-map to attach the appropriate IOMMU domain. Channels without a matching entry operate in bypass mode. To test this patch on i.MX95 for channels using shared SID, needs: https://lore.kernel.org/linux-iommu/20260916-smmu-shared-sid-v1-0-517384504aee@nxp.com/T/#t If only test channels that not needs shared SID, no need above patchset. Signed-off-by: Peng Fan --- Peng Fan (2): dt-bindings: dma: fsl,edma: add iommu-map property dmaengine: fsl-edma: add per-channel IOMMU support via iommu-map .../devicetree/bindings/dma/fsl,edma.yaml | 89 ++++++++++++++++++++++ drivers/dma/fsl-edma-common.c | 6 +- drivers/dma/fsl-edma-common.h | 1 + drivers/dma/fsl-edma-main.c | 76 +++++++++++++++++- 4 files changed, 169 insertions(+), 3 deletions(-) --- base-commit: e6e35979777d646fe3c7c94dca7dd32fb25d45f4 change-id: 20260916-edma-iommu-d5b8d0b515dd Best regards, -- Peng Fan