From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F23BF3EE1DB; Thu, 24 Sep 2026 08:35:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790238948; cv=none; b=UL3RCdCag9YwHsfhYSjUEYmqU+7gisThs2KcrNs48QM7kGMwTDMCCBJPUT9YPGTFeJfD5V2lhcBebzjP5WfEb8PPWtWxUThXWAYySvEJKLLmJfv8VabTLjEi6bn8bWeLVeKL367qlBT2pZRspWW602qqoUaIj+WXPCbzDngttzc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790238948; c=relaxed/simple; bh=GDPvqzIdf7dWtiW+r4RU/s6gFHkHS9Jkj3kF2ldX2DY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VTbZNgpEWxdEVa/Wd3XMzk8Vg0dBkigMGWr0TbSaEDRL8RlM2Zc4SNva7X52BwKIMswahn0KGx7eFWy25gPibyVmKizQUYrvwDCX4fDaoeH00Au9bEzkthR7mnDFR6mNPfxzJGZOy/NAdHZGLxNfKaz/qXnrWB2TNtNNUazmzfw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Q+DhYTx0; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Q+DhYTx0" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A40E81F00898; Thu, 24 Sep 2026 08:35:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1790238946; bh=eSgmYbypvypZExmUYGUr3iZuCKOxx6uzVDBzjJmL+GY=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=Q+DhYTx0ONsoCSy5aBc6I5/69j8s8VqdCLzJOXuTi1ViHVkwMayUKIEj83W+kForz wiAUQTuqAg5ScMS2/yBFepn/Hsc48WSsX2I8tF/dWr9ZkN+nLHBhYwdfvqe69BY/R8 AV2EFe3M2sPOL4ldnhVd9gnF8bA5YmvbBbWIvrzy2i4VUhdjGtMHoykdLen6hL+snM bGEx9jhSKLFttlq2/b4JSAW2+4NJ35PebgekmWfl1iAAyHlxs7GKw6X3PK7lcyD3PD gLpwlLyssWc2VwtcENZIbajr7AKV02oJD/Hx0Go7iSdt0zEEMRADTa2uVee8FEnhSt uVGq05vkVgbuA== From: Linus Walleij Date: Thu, 24 Sep 2026 10:35:30 +0200 Subject: [PATCH v6 18/23] dmaengine: ste_dma40: Reject direction changes after allocation Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260924-dma40-fixes-v6-18-fdb6755020a2@kernel.org> References: <20260924-dma40-fixes-v6-0-fdb6755020a2@kernel.org> In-Reply-To: <20260924-dma40-fixes-v6-0-fdb6755020a2@kernel.org> To: Vinod Koul , Frank Li Cc: dmaengine@vger.kernel.org, phone-devel@vger.kernel.org, Linus Walleij , sashiko-bot@kernel.org X-Mailer: b4 0.14.3 Logical channel allocation uses the configured direction to select the source or destination allocation mask, derive the logical channel number, and choose the LCPA location. d40_set_runtime_config_write() nevertheless overwrites the configured direction when a transfer is prepared for the opposite direction. d40_free_dma() then clears the wrong allocation mask, leaking the original resource and potentially releasing one used by another client. Reject directions that differ from the direction used during allocation and propagate runtime configuration errors to callers. Skip slave runtime configuration for memcpy transfers, which also use d40_prep_sg() but do not require it. Fixes: 95e1400fa131 ("DMAENGINE: add runtime slave config to DMA40 v3") Reported-by: sashiko-bot@kernel.org Closes: https://lore.kernel.org/dmaengine/20260618051539.15E201F000E9@smtp.kernel.org/ Assisted-by: LLM Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 660ac63efb40..4f5839691b85 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -2413,7 +2413,13 @@ d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src, return NULL; } - d40_set_runtime_config_write(dchan, &chan->slave_config, direction); + if (direction != DMA_MEM_TO_MEM) { + ret = d40_set_runtime_config_write(dchan, + &chan->slave_config, + direction); + if (ret) + return NULL; + } spin_lock_irqsave(&chan->lock, flags); @@ -2889,6 +2895,13 @@ static int d40_set_runtime_config_write(struct dma_chan *chan, return -EINVAL; } + if (direction != cfg->dir) { + chan_err(d40c, + "transfer direction %d differs from allocated direction %d\n", + direction, cfg->dir); + return -EINVAL; + } + src_addr_width = config->src_addr_width; src_maxburst = config->src_maxburst; dst_addr_width = config->dst_addr_width; @@ -2897,13 +2910,6 @@ static int d40_set_runtime_config_write(struct dma_chan *chan, if (direction == DMA_DEV_TO_MEM) { config_addr = config->src_addr; - if (cfg->dir != DMA_DEV_TO_MEM) - dev_dbg(d40c->base->dev, - "channel was not configured for peripheral " - "to memory transfer (%d) overriding\n", - cfg->dir); - cfg->dir = DMA_DEV_TO_MEM; - /* Configure the memory side */ if (dst_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) dst_addr_width = src_addr_width; @@ -2913,13 +2919,6 @@ static int d40_set_runtime_config_write(struct dma_chan *chan, } else if (direction == DMA_MEM_TO_DEV) { config_addr = config->dst_addr; - if (cfg->dir != DMA_MEM_TO_DEV) - dev_dbg(d40c->base->dev, - "channel was not configured for memory " - "to peripheral transfer (%d) overriding\n", - cfg->dir); - cfg->dir = DMA_MEM_TO_DEV; - /* Configure the memory side */ if (src_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) src_addr_width = dst_addr_width; -- 2.55.0