From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 884B9217723; Sun, 27 Sep 2026 09:03:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790499838; cv=none; b=kDSqZPFfU+izIsQp4KbPw8Ov1QuiSgxO4RieyNxnTE8RDfAVhoI5/Zptzp4tUMlPxiOyJ2T+3qloirojGr48RK7RB7bxzXQA30ZxP1qLucNvImqSfmpwI2uNglHp4v1KTuv/sAwq74lTUvI/USytF0jMmFyzRhikJIspMxuKQ50= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790499838; c=relaxed/simple; bh=vtgxc27jkwSW0OwKA6kfEkNbA5i58RbQCpqdkSo7BMo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ojg7owdqzo1vKtWLIm05SMc9hgFAjMdU4BXrCmof32dtwu0yRL9nF1Ni8Tu9fbjy7jKIIXGpaE2ymQ0ohVfr1IczP+JUmFKM4fiDw/th7gwZNqbBBuI9RAgmyjMJ1g5eQx5ZeBp/x2L3GE1xr0nxWvIqR/4TCs3W5q97O47FCb4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nddqmd8w; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nddqmd8w" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 90A0E1F0089A; Sun, 27 Sep 2026 09:03:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1790499837; bh=ZY69BKznUidwwCrMCBBwg3VMGrm+j5R0KhhfLKBamTU=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=nddqmd8wpDxX1EX5OSE7L+JgJeDgAN+XxoYwcmS+Xr3g+HEEPgnTXYEbSL1ZqKUOX H/hKOnnkwi0AR6ZNrAL30OaVTVGpjCNcqCwyp2EfkhuguUYXLaaPBfKJRaWpKBxbWP cCigoqtwt1LRccNSqCM19Kg2r8x0pyN6evprqPr4Q9n3PUuPNUmKhwfOpY+5H56NoS oVHxenqlTxVrZ4S2t141t2o7ZLGkrKFV24ZNFd4Q4v1C+BeqBcAMTz5riq5kMTa8ao uRYfoy8ab6KV36G9H7j49YxpFC8jQ0xfZh2VEge2vcobuaVxlWgRllf5nAmFmqVIER xBGsppuT+MN6A== From: Linus Walleij Date: Sun, 27 Sep 2026 11:03:31 +0200 Subject: [PATCH v7 18/24] dmaengine: ste_dma40: Reject direction changes after allocation Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260927-dma40-fixes-v7-18-89f595e8851d@kernel.org> References: <20260927-dma40-fixes-v7-0-89f595e8851d@kernel.org> In-Reply-To: <20260927-dma40-fixes-v7-0-89f595e8851d@kernel.org> To: Vinod Koul , Frank Li Cc: dmaengine@vger.kernel.org, phone-devel@vger.kernel.org, Linus Walleij , sashiko-bot@kernel.org, Frank Li X-Mailer: b4 0.14.3 Logical channel allocation uses the configured direction to select the source or destination allocation mask, derive the logical channel number, and choose the LCPA location. d40_set_runtime_config_write() nevertheless overwrites the configured direction when a transfer is prepared for the opposite direction. d40_free_dma() then clears the wrong allocation mask, leaking the original resource and potentially releasing one used by another client. Reject directions that differ from the direction used during allocation and propagate runtime configuration errors to callers. Skip slave runtime configuration for memcpy transfers, which also use d40_prep_sg() but do not require it. Fixes: 95e1400fa131 ("DMAENGINE: add runtime slave config to DMA40 v3") Reported-by: sashiko-bot@kernel.org Closes: https://lore.kernel.org/dmaengine/20260618051539.15E201F000E9@smtp.kernel.org/ Assisted-by: LLM Reviewed-by: Frank Li Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 479e69313e4a..1b1edcb72480 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -2410,7 +2410,13 @@ d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src, return NULL; } - d40_set_runtime_config_write(dchan, &chan->slave_config, direction); + if (direction != DMA_MEM_TO_MEM) { + ret = d40_set_runtime_config_write(dchan, + &chan->slave_config, + direction); + if (ret) + return NULL; + } spin_lock_irqsave(&chan->lock, flags); @@ -2886,6 +2892,13 @@ static int d40_set_runtime_config_write(struct dma_chan *chan, return -EINVAL; } + if (direction != cfg->dir) { + chan_err(d40c, + "transfer direction %d differs from allocated direction %d\n", + direction, cfg->dir); + return -EINVAL; + } + src_addr_width = config->src_addr_width; src_maxburst = config->src_maxburst; dst_addr_width = config->dst_addr_width; @@ -2894,13 +2907,6 @@ static int d40_set_runtime_config_write(struct dma_chan *chan, if (direction == DMA_DEV_TO_MEM) { config_addr = config->src_addr; - if (cfg->dir != DMA_DEV_TO_MEM) - dev_dbg(d40c->base->dev, - "channel was not configured for peripheral " - "to memory transfer (%d) overriding\n", - cfg->dir); - cfg->dir = DMA_DEV_TO_MEM; - /* Configure the memory side */ if (dst_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) dst_addr_width = src_addr_width; @@ -2910,13 +2916,6 @@ static int d40_set_runtime_config_write(struct dma_chan *chan, } else if (direction == DMA_MEM_TO_DEV) { config_addr = config->dst_addr; - if (cfg->dir != DMA_MEM_TO_DEV) - dev_dbg(d40c->base->dev, - "channel was not configured for memory " - "to peripheral transfer (%d) overriding\n", - cfg->dir); - cfg->dir = DMA_MEM_TO_DEV; - /* Configure the memory side */ if (src_addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) src_addr_width = dst_addr_width; -- 2.55.0