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Fri, 9 Oct 2026 05:19:23 +0000 X-MS-Exchange-Authentication-Results: mx.microsoft.com 1; spf=pass (sender IP is 222.71.101.198) smtp.mailfrom=cixtech.com; dkim=none (message not signed) header.d=none;dmarc=bestguesspass action=none header.from=cixtech.com; Received-SPF: Pass (protection.outlook.com: domain of cixtech.com designates 222.71.101.198 as permitted sender) receiver=protection.outlook.com; client-ip=222.71.101.198; helo=smtprelay.cixcomputing.com; pr=C Received: from smtprelay.cixcomputing.com (222.71.101.198) by SG1PEPF000082E4.mail.protection.outlook.com (10.167.240.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.522.6 via Frontend Transport; Fri, 9 Oct 2026 05:19:22 +0000 Received: from ubuntu (unknown [172.20.64.99]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id 878A840920F6; Fri, 9 Oct 2026 13:18:48 +0800 (CST) From: Jelly Jia To: vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.murphy@arm.com Cc: devicetree@vger.kernel.org, Frank.Li@kernel.org, cix-kernel-upstream@cixtech.com, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jelly.Jia@cixtech.com Subject: [PATCH v2 4/6] dt-bindings: dma: arm,dma-350: Document the CIX Sky1 integration Date: Fri, 9 Oct 2026 13:18:44 +0800 Message-ID: <20261009051846.1115962-5-Jelly.Jia@cixtech.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261009051846.1115962-1-Jelly.Jia@cixtech.com> References: <20260907033404.596839-1-Jelly.Jia@cixtech.com> <20261009051846.1115962-1-Jelly.Jia@cixtech.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG1PEPF000082E4:EE_|TYZPR06MB7191:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: b55b2b69-8bae-460e-2743-08df25c4e0d6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|23010399003|7416014|18002099003|22082099003|4143699003|56012099006|3023799007|6133799003|10067099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 5FvnDm0ET1KL0O4x3vMMG+AGkaPMSAPtpe+fnTCPohBGPr6itZGS/+b0uu0bltSraOPaQPT/RmvJq5SS1g0JZyzN0sjhKB43XRLTFlJMq+Jd5Kb+ZAD+MtabsIP5sziWyU/XeuphPNgquAL5i6qTiITKSbHooNnEEugTT/zQxqwIzStSbu0JIMK2FE0Cmz1EN0bv3qSwCN3wR2vkRUkzhv5oBq3qMhbFYq0WSlp7mRquh3VaBY4as9ZdU7a3++/DTVTuH6ssZYQBHOIPdOiCA+nO3cNW+/VLPysHo/GJdOMWR02ruFeNdmOYUlHCuWUbeH1y4YqnisR+3N8TdegIkdm0qFhzIr821W7i91n+mPTmpLXfWePG3sKSGZBFAbaQc5fDb6ylSt56BGRgTNExJKNxnc2rD30M+h2vEEpjKrVHG9KA+ZCDLWJ65bf5QOv2 X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Oct 2026 05:19:22.4010 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b55b2b69-8bae-460e-2743-08df25c4e0d6 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: SG1PEPF000082E4.apcprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYZPR06MB7191 The CIX Sky1 DMA-350 integration is the same device with SoC glue around it, so it is described by the arm,dma-350 node itself with an additional "cix,sky1-dma350" compatible rather than by a separate wrapper node. Extend the binding with the CIX compatible and the resources the integration needs: a clock, a reset, an optional reserved memory region used when the controller cannot reach all of system memory, and the syscon that routes the channel interrupts to the AP interrupt controller on Sky1. The cix,irq-router property is only valid together with the CIX compatible. Assisted-by: LLM checkpatch sparse dt_binding_check dtbs_check Signed-off-by: Jelly Jia --- v1 -> v2: - Folded the integration into arm,dma-350.yaml: the Sky1 DMA-350 is the same device, so it keeps the generic compatible plus a device specific "cix,sky1-dma350" compatible, and the integration resources are described on the controller node. - Dropped the separate cix,sky1-dma350.yaml wrapper binding. .../devicetree/bindings/dma/arm,dma-350.yaml | 33 ++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml index 429f682f15d8..3b991985c416 100644 --- a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml +++ b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml @@ -11,10 +11,23 @@ maintainers: allOf: - $ref: dma-controller.yaml# + - if: + not: + properties: + compatible: + contains: + const: cix,sky1-dma350 + then: + properties: + cix,irq-router: false properties: compatible: - const: arm,dma-350 + oneOf: + - const: arm,dma-350 + - items: + - const: cix,sky1-dma350 + - const: arm,dma-350 reg: items: @@ -36,6 +49,24 @@ properties: const: 1 description: The cell is the trigger input number + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + memory-region: + maxItems: 1 + description: + Reserved memory region used for DMA allocations when the controller + cannot reach all of system memory. + + cix,irq-router: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Syscon phandle for the CIX Sky1 subsystem register block that routes + DMA-350 channel interrupts to the AP interrupt controller. + required: - compatible - reg -- 2.54.0