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From: Lizhi Hou <lizhi.hou@amd.com>
To: <anthony@amarulasolutions.com>, Brian Xu <brian.xu@amd.com>,
	"Raj Kumar Rampelli" <raj.kumar.rampelli@amd.com>,
	Vinod Koul <vkoul@kernel.org>,
	Michal Simek <michal.simek@amd.com>
Cc: <dmaengine@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] dmaengine: xilinx: xdma: Fix regmap max_register
Date: Tue, 2 Sep 2025 09:42:51 -0700	[thread overview]
Message-ID: <423ef4b3-d92b-8833-e21e-88ac4153c87e@amd.com> (raw)
In-Reply-To: <20250901-xdma-max-reg-v2-1-fa3723a718cd@amarulasolutions.com>

Reviewed-by: Lizhi Hou <lizhi.hou@amd.com>

On 9/1/25 14:30, Anthony Brandon via B4 Relay wrote:
> From: Anthony Brandon <anthony@amarulasolutions.com>
>
> The max_register field is assigned the size of the register memory
> region instead of the offset of the last register.
> The result is that reading from the regmap via debugfs can cause
> a segmentation fault:
>
> tail /sys/kernel/debug/regmap/xdma.1.auto/registers
> Unable to handle kernel paging request at virtual address ffff800082f70000
> Mem abort info:
>    ESR = 0x0000000096000007
>    EC = 0x25: DABT (current EL), IL = 32 bits
>    SET = 0, FnV = 0
>    EA = 0, S1PTW = 0
>    FSC = 0x07: level 3 translation fault
> [...]
> Call trace:
>   regmap_mmio_read32le+0x10/0x30
>   _regmap_bus_reg_read+0x74/0xc0
>   _regmap_read+0x68/0x198
>   regmap_read+0x54/0x88
>   regmap_read_debugfs+0x140/0x380
>   regmap_map_read_file+0x30/0x48
>   full_proxy_read+0x68/0xc8
>   vfs_read+0xcc/0x310
>   ksys_read+0x7c/0x120
>   __arm64_sys_read+0x24/0x40
>   invoke_syscall.constprop.0+0x64/0x108
>   do_el0_svc+0xb0/0xd8
>   el0_svc+0x38/0x130
>   el0t_64_sync_handler+0x120/0x138
>   el0t_64_sync+0x194/0x198
> Code: aa1e03e9 d503201f f9400000 8b214000 (b9400000)
> ---[ end trace 0000000000000000 ]---
> note: tail[1217] exited with irqs disabled
> note: tail[1217] exited with preempt_count 1
> Segmentation fault
>
> Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
> ---
> Changes in v2:
> - Define new constant XDMA_MAX_REG_OFFSET and use that.
> - Link to v1: https://lore.kernel.org/r/20250901-xdma-max-reg-v1-1-b6a04561edb1@amarulasolutions.com
> ---
>   drivers/dma/xilinx/xdma-regs.h | 1 +
>   drivers/dma/xilinx/xdma.c      | 2 +-
>   2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/dma/xilinx/xdma-regs.h b/drivers/dma/xilinx/xdma-regs.h
> index 6ad08878e93862b770febb71b8bc85e66813428e..70bca92621aa41b0367d1e236b3e276344a26320 100644
> --- a/drivers/dma/xilinx/xdma-regs.h
> +++ b/drivers/dma/xilinx/xdma-regs.h
> @@ -9,6 +9,7 @@
>   
>   /* The length of register space exposed to host */
>   #define XDMA_REG_SPACE_LEN	65536
> +#define XDMA_MAX_REG_OFFSET	(XDMA_REG_SPACE_LEN - 4)
>   
>   /*
>    * maximum number of DMA channels for each direction:
> diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c
> index 0d88b1a670e142dac90d09c515809faa2476a816..5ecf8223c112e468c79ce635398ba393a535b9e0 100644
> --- a/drivers/dma/xilinx/xdma.c
> +++ b/drivers/dma/xilinx/xdma.c
> @@ -38,7 +38,7 @@ static const struct regmap_config xdma_regmap_config = {
>   	.reg_bits = 32,
>   	.val_bits = 32,
>   	.reg_stride = 4,
> -	.max_register = XDMA_REG_SPACE_LEN,
> +	.max_register = XDMA_MAX_REG_OFFSET,
>   };
>   
>   /**
>
> ---
> base-commit: b320789d6883cc00ac78ce83bccbfe7ed58afcf0
> change-id: 20250901-xdma-max-reg-1649c6459358
>
> Best regards,

  reply	other threads:[~2025-09-02 16:42 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-01 21:30 [PATCH v2] dmaengine: xilinx: xdma: Fix regmap max_register Anthony Brandon via B4 Relay
2025-09-02 16:42 ` Lizhi Hou [this message]
2025-09-02 16:46   ` Lizhi Hou

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