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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-66c07ab1634sm2476185a12.16.2026.04.01.03.21.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Apr 2026 03:21:06 -0700 (PDT) Message-ID: <52685536-6b77-497b-aa48-621a82da2a0e@oss.qualcomm.com> Date: Wed, 1 Apr 2026 12:21:03 +0200 Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 4/4] i2c: qcom-geni: Support multi-owner controllers in GPI mode To: Mukesh Kumar Savaliya , viken.dadhaniya@oss.qualcomm.com, andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, Frank.Li@kernel.org, andersson@kernel.org, konradybcio@kernel.org, dmitry.baryshkov@oss.qualcomm.com, linmq006@gmail.com, quic_jseerapu@quicinc.com, agross@kernel.org, linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org Cc: krzysztof.kozlowski@oss.qualcomm.com, bartosz.golaszewski@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com References: <20260331114742.2896317-1-mukesh.savaliya@oss.qualcomm.com> <20260331114742.2896317-5-mukesh.savaliya@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260331114742.2896317-5-mukesh.savaliya@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=ZfUQ98VA c=1 sm=1 tr=0 ts=69ccf195 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=1VLNcVKysphvfcDyL1cA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-GUID: rA6ZgYemqHKIuunG-hrRNRe_YhCNEhVb X-Proofpoint-ORIG-GUID: rA6ZgYemqHKIuunG-hrRNRe_YhCNEhVb X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDAxMDA5NCBTYWx0ZWRfXwQ2tFX4Esuhd 65nqPAQIGLA+gJZeMGx53m6T5x3LU+vXX9v2l4G0ZDmGoBj8NXaGT7gTEiZNqrIFmNANAaHdFDw qy15vLAviEzUfPNQzK8Y8veN3kOPdj1tEvVsL2MVlTauscp0o96ljNhjvLMLwEQszYkVvI13CQo 1rtz/bB1MjbGfAx/Lbp5JRFcyslz1yM9DavLTQBFFuksALeo24rt3rKRf4yoNaP+C1I1sKIcgPt uXF4570Ss0nnEk5WJw4TkVR/Urex2pd8qX7Ah9NK8v9JvikAd88DqwNpo2UtEDTnOXnssuVSOJO 9CMO5KnmVuhQx5rx10iVAFUhqvqNPVgWzSGqoX99T6cMFBct93vX5Ojna/lypN4FMMdZ4QfYh83 IOCtRaNbA3pMlLywvcb5Ibvg7cRr86JtdscTvPLVJMawd3pX3Djbs6YowUm1Ko8utGfCssoHLuo xNJIg0929nv8ONLh2aQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-01_03,2026-04-01_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 spamscore=0 clxscore=1015 bulkscore=0 suspectscore=0 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604010094 On 3/31/26 1:47 PM, Mukesh Kumar Savaliya wrote: > Some platforms use a QUP-based I2C controller in a configuration where the > controller is shared with another system processor. In this setup the > operating system must not assume exclusive ownership of the controller or > its associated pins. > > Add support for enabling multi-owner operation when DeviceTree specifies > qcom,qup-multi-owner. When enabled, mark the underlying serial engine as > shared so the common GENI resource handling avoids selecting the "sleep" > pinctrl state, which could disrupt transfers initiated by the other > processor. > > For GPI mode transfers, request lock/unlock TRE sequencing from the GPI > driver by setting a single lock_action selector per message, emitting lock > before the first message and unlock after the last message (handling the > single-message case as well). This serializes access to the shared > controller without requiring message-position flags to be passed into the > DMA engine layer. > > Signed-off-by: Mukesh Kumar Savaliya > --- [...] > + if (of_property_read_bool(pdev->dev.of_node, "qcom,qup-multi-owner")) { > + /* > + * Multi-owner controller configuration: the controller may be > + * used by another system processor. Mark the SE as shared so > + * common GENI resource handling can avoid pin state changes > + * that would disrupt the other user. > + */ I don't find this comment very useful given we have kerneldoc for that property and the behavior you described impacts another file [...] > + if (gi2c->se.multi_owner) > + dev_err_probe(dev, -EINVAL, "I2C sharing not supported in non GSI mode\n"); return dev_err_probe() Konrad