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Fri, 19 Sep 2025 06:01:03 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 58J612t4026351 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 19 Sep 2025 06:01:03 GMT Received: from [10.50.44.58] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.24; Thu, 18 Sep 2025 23:00:36 -0700 Message-ID: <6e113a14-9321-ecf8-8502-623d2e6e8899@quicinc.com> Date: Fri, 19 Sep 2025 11:30:33 +0530 Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH 6/9] arm64: dts: qcom: ipq5424: Enable QPIC SPI NAND support Content-Language: en-US To: Konrad Dybcio , , , , , , , , , , , , CC: References: <20250918094017.3844338-1-quic_mdalam@quicinc.com> <20250918094017.3844338-7-quic_mdalam@quicinc.com> <905d90fc-eac3-485b-bd8e-98c1e4aff29e@oss.qualcomm.com> From: Md Sadre Alam In-Reply-To: <905d90fc-eac3-485b-bd8e-98c1e4aff29e@oss.qualcomm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=e50GSbp/ c=1 sm=1 tr=0 ts=68ccf19f cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=fLZ40zuDvd0M7feFtTMA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: roIUYdX7N4CvjWbN26L4pN3roGUNjE2k X-Proofpoint-ORIG-GUID: roIUYdX7N4CvjWbN26L4pN3roGUNjE2k X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTE2MDIwMiBTYWx0ZWRfXyfshGWQ6E5q+ HTi3N55kfjTpYT0cEV8CNxpd31hsFsj0eDkujygZz5cX/A1rZnCIDM+uh3+WKmZZI5h5IshIecf 2KPJeTNnc4BHhfVRbwcyfDVTJCg+8CfnSMKjupBr3SesEFM2vwpg1LBAPh2Sz/lJcOVaCpfx6tm p+c9py5MGhyc6mAvGnn6g//WUxRq8NWfQPFiVMy6Eh6dIhjO+uYQk13N4amS85XURaLZ84Ynlae hnKahApnz0Cep/7nP288Ql9aYTVdYcB6UhlSxV+YoIkFNsqG3/EJY6ha5i27TuEfBU5RNeQkgNd Crr12vp6t3xN0dU10fJG6olAmAWWkRRgA09eXAsxeK3gHuZK4eQxOPPzzmevRik5q2KTiOS00jl 6LtBXpZ6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-18_03,2025-09-19_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 clxscore=1015 spamscore=0 priorityscore=1501 phishscore=0 malwarescore=0 suspectscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509160202 On 9/18/2025 6:18 PM, Konrad Dybcio wrote: > On 9/18/25 11:40 AM, Md Sadre Alam wrote: >> Enable QPIC SPI NAND flash controller support on the IPQ5424 RDP466 >> reference design platform. >> >> The RDP466 board features a SPI NAND flash device connected to the QPIC >> controller for primary storage. This patch enables the QPIC BAM DMA >> controller and SPI NAND interface of QPIC, and configures the necessary >> pin control settings for proper operation. >> >> Signed-off-by: Md Sadre Alam >> --- > > [...] > >> +&qpic_nand { >> + pinctrl-0 = <&qpic_snand_default_state>; >> + pinctrl-names = "default"; >> + status = "okay"; > > \n before 'status' is customary Ok > > Reviewed-by: Konrad Dybcio > > Konrad