From: Baolu Lu <baolu.lu@linux.intel.com>
To: Jacob Pan <jacob.jun.pan@linux.intel.com>,
LKML <linux-kernel@vger.kernel.org>,
iommu@lists.linux.dev, Robin Murphy <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@nvidia.com>, Joerg Roedel <joro@8bytes.org>,
dmaengine@vger.kernel.org, vkoul@kernel.org
Cc: baolu.lu@linux.intel.com, Will Deacon <will@kernel.org>,
David Woodhouse <dwmw2@infradead.org>,
Raj Ashok <ashok.raj@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>, Yi Liu <yi.l.liu@intel.com>,
"Yu, Fenghua" <fenghua.yu@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
Tony Luck <tony.luck@intel.com>,
"Zanussi, Tom" <tom.zanussi@intel.com>,
narayan.ranganathan@intel.com
Subject: Re: [PATCH v5 5/7] iommu/vt-d: Prepare PASID attachment beyond RID_PASID
Date: Wed, 3 May 2023 14:49:36 +0800 [thread overview]
Message-ID: <75bdf30c-d38f-ef95-7618-91ebf35ea297@linux.intel.com> (raw)
In-Reply-To: <20230427174937.471668-6-jacob.jun.pan@linux.intel.com>
On 4/28/23 1:49 AM, Jacob Pan wrote:
> @@ -2433,12 +2477,17 @@ static int dmar_domain_attach_device_pasid(struct dmar_domain *domain,
> struct intel_iommu *iommu,
> struct device *dev, ioasid_t pasid)
> {
> + struct device_pasid_info *dev_pasid;
> + unsigned long flags;
> int ret;
>
> - /* PASID table is mandatory for a PCI device in scalable mode. */
> if (!sm_supported(iommu) && dev_is_real_dma_subdevice(dev))
> return -EOPNOTSUPP;
>
> + dev_pasid = kzalloc(sizeof(*dev_pasid), GFP_KERNEL);
> + if (!dev_pasid)
> + return -ENOMEM;
> +
> if (hw_pass_through && domain_type_is_si(domain))
> ret = intel_pasid_setup_pass_through(iommu, domain, dev, pasid);
> else if (domain->use_first_level)
> @@ -2446,6 +2495,17 @@ static int dmar_domain_attach_device_pasid(struct dmar_domain *domain,
> else
> ret = intel_pasid_setup_second_level(iommu, domain, dev, pasid);
>
> + if (ret) {
> + kfree(dev_pasid);
> + return ret;
> + }
> +
> + dev_pasid->pasid = pasid;
> + dev_pasid->dev = dev;
> + spin_lock_irqsave(&domain->lock, flags);
> + list_add(&dev_pasid->link_domain, &domain->dev_pasids);
> + spin_unlock_irqrestore(&domain->lock, flags);
> +
> return 0;
> }
>
> @@ -2467,16 +2527,13 @@ static int dmar_domain_attach_device(struct dmar_domain *domain,
> return ret;
> info->domain = domain;
> spin_lock_irqsave(&domain->lock, flags);
> + if (info->dev_attached) {
> + spin_unlock_irqrestore(&domain->lock, flags);
> + return 0;
> + }
> list_add(&info->link, &domain->devices);
> spin_unlock_irqrestore(&domain->lock, flags);
>
> - ret = dmar_domain_attach_device_pasid(domain, iommu, dev,
> - IOMMU_DEF_RID_PASID);
> - if (ret) {
> - dev_err(dev, "Setup RID2PASID failed\n");
> - device_block_translation(dev);
> - }
> -
> ret = domain_context_mapping(domain, dev);
> if (ret) {
> dev_err(dev, "Domain context map failed\n");
> @@ -2485,8 +2542,9 @@ static int dmar_domain_attach_device(struct dmar_domain *domain,
> }
>
> iommu_enable_pci_caps(info);
> + info->dev_attached = 1;
>
> - return 0;
> + return ret;
> }
>
> static bool device_has_rmrr(struct device *dev)
> @@ -4044,6 +4102,7 @@ static void device_block_translation(struct device *dev)
>
> spin_lock_irqsave(&info->domain->lock, flags);
> list_del(&info->link);
> + info->dev_attached = 0;
> spin_unlock_irqrestore(&info->domain->lock, flags);
>
> domain_detach_iommu(info->domain, iommu);
> @@ -4175,8 +4234,15 @@ static int intel_iommu_attach_device(struct iommu_domain *domain,
> struct device *dev)
> {
> struct device_domain_info *info = dev_iommu_priv_get(dev);
> + struct dmar_domain *dmar_domain = to_dmar_domain(domain);
> + struct intel_iommu *iommu;
> + u8 bus, devfn;
> int ret;
>
> + iommu = device_to_iommu(dev, &bus, &devfn);
> + if (!iommu)
> + return -ENODEV;
> +
> if (domain->type == IOMMU_DOMAIN_UNMANAGED &&
> device_is_rmrr_locked(dev)) {
> dev_warn(dev, "Device is ineligible for IOMMU domain attach due to platform RMRR requirement. Contact your platform vendor.\n");
> @@ -4190,7 +4256,23 @@ static int intel_iommu_attach_device(struct iommu_domain *domain,
> if (ret)
> return ret;
>
> - return dmar_domain_attach_device(to_dmar_domain(domain), dev);
> + ret = dmar_domain_attach_device(to_dmar_domain(domain), dev);
> + if (ret) {
> + dev_err(dev, "Attach device failed\n");
> + return ret;
> + }
> +
> + /* PASID table is mandatory for a PCI device in scalable mode. */
> + if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) {
> + /* Setup the PASID entry for requests without PASID: */
> + ret = dmar_domain_attach_device_pasid(dmar_domain, iommu, dev,
> + IOMMU_DEF_RID_PASID);
> + if (ret) {
> + dev_err(dev, "Setup RID2PASID failed\n");
> + device_block_translation(dev);
> + }
> + }
> + return ret;
> }
>
> static int intel_iommu_map(struct iommu_domain *domain,
I am not following why do you need to change the attach_device path in
this patch. Perhaps you want to make sure that context entry for the
device is configured before attach_device_pasid?
Best regards,
baolu
next prev parent reply other threads:[~2023-05-03 6:50 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-27 17:49 [PATCH v5 0/7] Re-enable IDXD kernel workqueue under DMA API Jacob Pan
2023-04-27 17:49 ` [PATCH v5 1/7] iommu: Generalize default PCIe requester ID PASID Jacob Pan
2023-04-28 9:38 ` Tian, Kevin
2023-04-28 15:56 ` Jacob Pan
2023-05-05 8:28 ` Tian, Kevin
2023-05-09 20:39 ` Jacob Pan
2023-04-27 17:49 ` [PATCH v5 2/7] iommu/sva: Explicitly exclude RID_PASID from SVA Jacob Pan
2023-04-28 9:40 ` Tian, Kevin
2023-04-28 15:56 ` Jacob Pan
2023-04-27 17:49 ` [PATCH v5 3/7] iommu: Move global PASID allocation from SVA to core Jacob Pan
2023-04-28 9:46 ` Tian, Kevin
2023-04-28 16:40 ` Jacob Pan
2023-05-03 6:32 ` Baolu Lu
2023-05-04 21:26 ` Jacob Pan
2023-04-27 17:49 ` [PATCH v5 4/7] iommu/vt-d: Factoring out PASID set up helper function Jacob Pan
2023-04-28 9:47 ` Tian, Kevin
2023-05-03 6:37 ` Baolu Lu
2023-05-04 21:39 ` Jacob Pan
2023-05-04 21:27 ` Jacob Pan
2023-04-27 17:49 ` [PATCH v5 5/7] iommu/vt-d: Prepare PASID attachment beyond RID_PASID Jacob Pan
2023-05-03 6:49 ` Baolu Lu [this message]
2023-05-04 21:53 ` Jacob Pan
2023-04-27 17:49 ` [PATCH v5 6/7] iommu/vt-d: Implement set_dev_pasid domain op Jacob Pan
2023-05-03 7:26 ` Baolu Lu
2023-05-04 23:03 ` Jacob Pan
2023-05-05 2:58 ` Baolu Lu
2023-05-05 20:32 ` Jacob Pan
2023-04-27 17:49 ` [PATCH v5 7/7] dmaengine/idxd: Re-enable kernel workqueue under DMA API Jacob Pan
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