Re: [PATCH] dt-bindings: dma: xilinx: Fix "xlnx,irq-delay" type

["Pandey, Radhey Shyam" <radheys@amd.com>]

> "xlnx,irq-delay" programs an 8-bit delay field in the DMA control
> register, and the driver stores and reads it as a byte. The binding
> described the property as a uint32 cell, which made the helper type
> check report the driver as wrong.
> 
> Document "xlnx,irq-delay" as uint8 so the generated schema reflects
> the hardware field width and the existing driver access.
> 
> Assisted-by: Codex:gpt-5-5
> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>

Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Thanks!

> ---
>   Documentation/devicetree/bindings/dma/xilinx/xlnx,axi-dma.yaml | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/dma/xilinx/xlnx,axi-dma.yaml b/Documentation/devicetree/bindings/dma/xilinx/xlnx,axi-dma.yaml
> index 340ae9e91cb0..ba0fc515d825 100644
> --- a/Documentation/devicetree/bindings/dma/xilinx/xlnx,axi-dma.yaml
> +++ b/Documentation/devicetree/bindings/dma/xilinx/xlnx,axi-dma.yaml
> @@ -93,7 +93,7 @@ properties:
>         Width in bits of the length register as configured in hardware.
>   
>     xlnx,irq-delay:
> -    $ref: /schemas/types.yaml#/definitions/uint32
> +    $ref: /schemas/types.yaml#/definitions/uint8
>       minimum: 0
>       maximum: 255
>       description: