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From: "Verma, Devendra" <devverma@amd.com>
To: sashiko-reviews@lists.linux.dev
Cc: dmaengine@vger.kernel.org, linux-pci@vger.kernel.org,
	Frank.Li@kernel.org, vkoul@kernel.org, devverma@amd.com
Subject: Re: [PATCH v4 1/2] dmaengine: dw-edma: Enable Chan Separation via VSEC
Date: Wed, 19 Aug 2026 14:47:37 +0530	[thread overview]
Message-ID: <82f00288-596d-4445-b40e-abe54fb5195e@amd.com> (raw)
In-Reply-To: <20260819071954.D79D01F000E9@smtp.kernel.org>

On 19-Aug-26 12:49, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] The parsed channel separation size (`ch_space_sz`) is extracted from the PCIe VSEC but never read or passed to the DMA core, resulting in dead code and an incomplete feature.
> --
> 
> --- Patch [1]: [PATCH v4 1/2] dmaengine: dw-edma: Enable Chan Separation via VSEC ---
> commit b605eb99c5a71a0d4b5d7b6b4068f555cc7fee6e
> Author: Devendra K Verma <devverma@amd.com>
> Subject: dmaengine: dw-edma: Enable Chan Separation via VSEC
> 
> This commit extracts the HDMA IP channel separation size from the PCIe VSEC
> capabilities. It then stores this parsed size in the driver data structure.
> 
>> diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c
>> index 791c46e8ae4c4..f287879b2cb9e 100644
>> --- a/drivers/dma/dw-edma/dw-edma-pcie.c
>> +++ b/drivers/dma/dw-edma/dw-edma-pcie.c
> [ ... ]
>> @@ -279,6 +289,10 @@ static void dw_edma_pcie_get_xilinx_dma_data(struct pci_dev *pdev,
>>   	pdata->mf = map;
>>   	pdata->rg.bar = FIELD_GET(DW_PCIE_XILINX_MDB_VSEC_DMA_BAR, val);
>>   
>> +	if (pdev->device == PCI_DEVICE_ID_XILINX_B00F)
>> +		pdata->ch_space_sz = dw_edma_get_ch_space_sz
>> +					(FIELD_GET(DW_PCIE_XILINX_CPM6_VSEC_CH_SEP, val));
> 
> [Severity: Medium]
> Is the extracted ch_space_sz value actually used anywhere after it is stored?
> 
> The commit message states this enables configurable channel separation, but it
> appears that pdata->ch_space_sz is only saved in the driver-private structure
> in dw_edma_pcie_get_xilinx_dma_data() and never passed to the DMA core.
> 
> The patch changelog notes that the first patch of the original series was
> dropped after review. Does this omission leave the core IP driver using its
> hardcoded 256-byte layout, making this extracted value functionally inert dead
> code?
> 

This patch series only implements the extraction of the channel
separation size code via VSEC and function to convert the code to
actual size. This change may not cause any impact on the functionality
of the existing code. The patch 2/2 of this patch series utilizes this
implementation.

-Devendra

  reply	other threads:[~2026-08-19  9:17 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-19  7:09 [PATCH v4 0/2] CPM6 Channel Separation Support Devendra K Verma
2026-08-19  7:09 ` [PATCH v4 1/2] dmaengine: dw-edma: Enable Chan Separation via VSEC Devendra K Verma
2026-08-19  7:19   ` sashiko-bot
2026-08-19  9:17     ` Verma, Devendra [this message]
2026-08-19  7:09 ` [PATCH v4 2/2] dmaengine: dw-edma: Add changes to support Channel Separation Devendra K Verma
2026-08-19  7:19   ` sashiko-bot
2026-08-19  9:22     ` Verma, Devendra

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