From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: dmaengine: stm32-dma: fix residue calculation in stm32-dma From: Arnaud Pouliquen Message-Id: <85a76ca4-6cad-e533-ff7b-64a660d1a2a0@st.com> Date: Tue, 23 Apr 2019 17:18:58 +0200 To: Vinod Koul Cc: Dan Williams , Pierre-Yves MORDRET , linux-stm32@st-md-mailman.stormreply.com, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org List-ID: SGVsbG8gVmlub2QsCgpKdXN0IGEgZ2VudGxlIHJlbWluZGVyLCBpZiB5b3UgY291bGQgdGFrZSBh IG1vbWVudCB0byByZXZpZXcgdGhpcyBwYXRjaC4KRllJLCB0aGUgcGF0Y2ggaGFzIGFscmVhZHkg YmVlbiBpbnRlcm5hbGx5IHJldmlld2VkIGJ5IFBpZXJyZSBZdmVzCm1vcmRyZXQuLi4KSGlzIHNp Z24tb2ZmIGlzIGluIHRoZSBjb21taXQgbWVzc2FnZS4KClRoYW5rcywKCkFybmF1ZAoKCk9uIDMv MjcvMTkgMToyMSBQTSwgQXJuYXVkIFBvdWxpcXVlbiB3cm90ZToKPiBEdXJpbmcgcmVzaWR1ZSBj YWxjdWxhdGlvbi4gdGhlIERNQSBjYW4gc3dpdGNoIHRvIHRoZSBuZXh0IHNnLiBXaGVuCj4gdGhp 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residue calculation in stm32-dma To: Vinod Koul CC: Dan Williams , Pierre-Yves MORDRET , , , References: <1553689316-6231-1-git-send-email-arnaud.pouliquen@st.com> From: Arnaud Pouliquen Openpgp: preference=signencrypt Autocrypt: addr=arnaud.pouliquen@st.com; prefer-encrypt=mutual; keydata= xsFNBFZu+HIBEAC/bt4pnj18oKkUw40q1IXSPeDFOuuznWgFbjFS6Mrb8axwtnxeYicv0WAL rWhlhQ6W2TfKDJtkDygkfaZw7Nlsj57zXrzjVXuy4Vkezxtg7kvSLYItQAE8YFSOrBTL58Yd d5cAFz/9WbWGRf0o9MxFavvGQ9zkfHVd+Ytw6dJNP4DUys9260BoxKZZMaevxobh5Hnram6M gVBYGMuJf5tmkXD/FhxjWEZ5q8pCfqZTlN9IZn7S8d0tyFL7+nkeYldA2DdVplfXXieEEURQ aBjcZ7ZTrzu1X/1RrH1tIQE7dclxk5pr2xY8osNePmxSoi+4DJzpZeQ32U4wAyZ8Hs0i50rS VxZuT2xW7tlNcw147w+kR9+xugXrECo0v1uX7/ysgFnZ/YasN8E+osM2sfa7OYUloVX5KeUK yT58KAVkjUfo0OdtSmGkEkILWQLACFEFVJPz7/I8PisoqzLS4Jb8aXbrwgIg7d4NDgW2FddV X9jd1odJK5N68SZqRF+I8ndttRGK0o7NZHH4hxJg9jvyEELdgQAmjR9Vf0eZGNfowLCnVcLq s+8q3nQ1RrW5cRBgB8YT2kC8wwY5as8fhfp4846pe2b8Akh0+Vba5pXaTvtmdOMRrcS7CtF6 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peWAlfCXVtErSQ17QzNydFDOysL1GIVn0+XY7X4Bq+KpVmhQOloEX5/At4FlhOpsv9AQ30rZ 3F5lo6FG1EqLIvg4FnMJldDmszZRv0bR0RM9Ag71J9bgwHEn8uS2vafuL1hOazZ0eAo7Oyup 2VNRC7Inbc+irY1qXSjmq3ZrD3SSZVa+LhYfijFYuEgKjs4s+Dvk/xVL0JYWbKkpGWRz5M82 Pj7co6u8pTEReGBYSVUBHx7GF1e3L/IMZZMquggEsixD8CYMOzahCEZ7UUwD5LKxRfmBWBgK 36tfTyducLyZtGB3mbJYfWeI7aiFgYsd5ehov6OIBlOz5iOshd97+wbbmziYEp6jWMIMX+Em zqSvS5ETZydayO5JBbw7fFBd1nGVYk1WL6Ll72g+iEnqgIckMtxey1TgfT7GhPkR7hl54ZAe 8mOik8I/F6EW8XyQAA2P Message-ID: <85a76ca4-6cad-e533-ff7b-64a660d1a2a0@st.com> Date: Tue, 23 Apr 2019 17:18:58 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <1553689316-6231-1-git-send-email-arnaud.pouliquen@st.com> Content-Type: text/plain; charset="UTF-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG1NODE1.st.com (10.75.127.1) To SFHDAG3NODE1.st.com (10.75.127.7) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-04-23_04:,, signatures=0 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Message-ID: <20190423151858.Lnxz3zu4v5qTZ_jcAkZm_r1eT9c3cbTOFUGXOEUkJpg@z> Hello Vinod, Just a gentle reminder, if you could take a moment to review this patch. FYI, the patch has already been internally reviewed by Pierre Yves mordret... His sign-off is in the commit message. Thanks, Arnaud On 3/27/19 1:21 PM, Arnaud Pouliquen wrote: > During residue calculation. the DMA can switch to the next sg. When > this race condition occurs, the residue returned value is not valid. > Indeed the position in the sg returned by the hardware is the position > of the next sg, not the current sg. > Solution is to check the sg after the calculation to verify it. > If a transition is detected we consider that the DMA has switched to > the beginning of next sg. > > Signed-off-by: Arnaud Pouliquen > Signed-off-by: Pierre-Yves MORDRET > --- > drivers/dma/stm32-dma.c | 70 ++++++++++++++++++++++++++++++++++++++++--------- > 1 file changed, 57 insertions(+), 13 deletions(-) > > diff --git a/drivers/dma/stm32-dma.c b/drivers/dma/stm32-dma.c > index 4903a40..30309d2 100644 > --- a/drivers/dma/stm32-dma.c > +++ b/drivers/dma/stm32-dma.c > @@ -1038,33 +1038,77 @@ static u32 stm32_dma_get_remaining_bytes(struct stm32_dma_chan *chan) > return ndtr << width; > } > > +static bool stm32_dma_is_current_sg(struct stm32_dma_chan *chan) > +{ > + struct stm32_dma_device *dmadev = stm32_dma_get_dev(chan); > + struct stm32_dma_sg_req *sg_req; > + u32 dma_scr, dma_smar, id; > + > + id = chan->id; > + dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id)); > + > + if (!(dma_scr & STM32_DMA_SCR_DBM)) > + return true; > + > + sg_req = &chan->desc->sg_req[chan->next_sg]; > + > + if (dma_scr & STM32_DMA_SCR_CT) { > + dma_smar = stm32_dma_read(dmadev, STM32_DMA_SM0AR(id)); > + return (dma_smar == sg_req->chan_reg.dma_sm0ar); > + } > + > + dma_smar = stm32_dma_read(dmadev, STM32_DMA_SM1AR(id)); > + > + return (dma_smar == sg_req->chan_reg.dma_sm1ar); > +} > + > static size_t stm32_dma_desc_residue(struct stm32_dma_chan *chan, > struct stm32_dma_desc *desc, > u32 next_sg) > { > u32 modulo, burst_size; > - u32 residue = 0; > + u32 residue; > + u32 n_sg = next_sg; > + struct stm32_dma_sg_req *sg_req = &chan->desc->sg_req[chan->next_sg]; > int i; > > + residue = stm32_dma_get_remaining_bytes(chan); > + > /* > - * In cyclic mode, for the last period, residue = remaining bytes from > - * NDTR > + * Calculate the residue means compute the descriptors > + * information: > + * - the sg currently transferred > + * - the remaining position in this sg (NDTR). > + * > + * The issue is that a race condition can occur if DMA is > + * running. DMA can have started to transfer the next sg before > + * the position in sg is read. In this case the remaing position > + * can correspond to the new sg position. > + * The strategy implemented in the stm32 driver is to check the > + * sg transition. If detected we can not trust the SxNDTR register > + * value, this register can not be up to date during the transition. > + * In this case we can assume that the dma is at the beginning of next > + * sg so we calculate the residue in consequence. > */ > - if (chan->desc->cyclic && next_sg == 0) { > - residue = stm32_dma_get_remaining_bytes(chan); > - goto end; > + > + if (!stm32_dma_is_current_sg(chan)) { > + n_sg++; > + if (n_sg == chan->desc->num_sgs) > + n_sg = 0; > + residue = sg_req->len; > } > > /* > - * For all other periods in cyclic mode, and in sg mode, > - * residue = remaining bytes from NDTR + remaining periods/sg to be > - * transferred > + * In cyclic mode, for the last period, residue = remaining bytes > + * from NDTR, > + * else for all other periods in cyclic mode, and in sg mode, > + * residue = remaining bytes from NDTR + remaining > + * periods/sg to be transferred > */ > - for (i = next_sg; i < desc->num_sgs; i++) > - residue += desc->sg_req[i].len; > - residue += stm32_dma_get_remaining_bytes(chan); > + if (!chan->desc->cyclic || n_sg != 0) > + for (i = n_sg; i < desc->num_sgs; i++) > + residue += desc->sg_req[i].len; > > -end: > if (!chan->mem_burst) > return residue; > >