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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id l7-20020a9d4c07000000b005afa8981a42sm914321otf.8.2022.03.03.05.42.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Mar 2022 05:42:12 -0800 (PST) Received: (nullmailer pid 1490403 invoked by uid 1000); Thu, 03 Mar 2022 13:42:11 -0000 Date: Thu, 3 Mar 2022 07:42:11 -0600 From: Rob Herring To: Miquel Raynal Cc: Vinod Koul , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Thomas Petazzoni , Geert Uytterhoeven Subject: Re: [PATCH v3 1/7] dt-bindings: dma: Introduce RZN1 dmamux bindings Message-ID: References: <20220225112403.505562-1-miquel.raynal@bootlin.com> <20220225112403.505562-2-miquel.raynal@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220225112403.505562-2-miquel.raynal@bootlin.com> Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org On Fri, Feb 25, 2022 at 12:23:56PM +0100, Miquel Raynal wrote: > The Renesas RZN1 DMA IP is a based on a DW core, with eg. an additional > dmamux register located in the system control area which can take up to > 32 requests (16 per DMA controller). Each DMA channel can be wired to > two different peripherals. This should be a child of and referenced by the 'system control area' schema. Also, add a reg property for the register. > Signed-off-by: Miquel Raynal > Reviewed-by: Geert Uytterhoeven > --- > .../bindings/dma/renesas,rzn1-dmamux.yaml | 42 +++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 43 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml > > diff --git a/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml > new file mode 100644 > index 000000000000..e2c82e43b8b1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml > @@ -0,0 +1,42 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/renesas,rzn1-dmamux.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas RZ/N1 DMA mux > + > +maintainers: > + - Miquel Raynal > + > +allOf: > + - $ref: "dma-router.yaml#" > + > +properties: > + compatible: > + const: renesas,rzn1-dmamux > + > + '#dma-cells': > + const: 6 > + description: > + The first four cells are dedicated to the master DMA controller. The fifth > + cell gives the DMA mux bit index that must be set starting from 0. The > + sixth cell gives the binary value that must be written there, ie. 0 or 1. > + > + dma-masters: > + minItems: 1 > + maxItems: 2 > + > + dma-requests: > + const: 32 > + > +additionalProperties: false > + > +examples: > + - | > + dma-router { > + compatible = "renesas,rzn1-dmamux"; > + #dma-cells = <6>; > + dma-masters = <&dma0 &dma1>; > + dma-requests = <32>; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index ea3e6c914384..c70c9c39a2f3 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -18636,6 +18636,7 @@ SYNOPSYS DESIGNWARE DMAC DRIVER > M: Viresh Kumar > R: Andy Shevchenko > S: Maintained > +F: Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml > F: Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml > F: drivers/dma/dw/ > F: include/dt-bindings/dma/dw-dmac.h > -- > 2.27.0 > >