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From: Vinod Koul <vkoul@kernel.org>
To: Dave Jiang <dave.jiang@intel.com>
Cc: dmaengine@vger.kernel.org
Subject: Re: [PATCH] dmaengine: idxd: set max_xfer and max_batch for RO device
Date: Wed, 20 Apr 2022 17:18:32 +0530	[thread overview]
Message-ID: <Yl/zEJN0oCkCYUGa@matsya> (raw)
In-Reply-To: <164971507673.2201761.11244446608988838897.stgit@djiang5-desk3.ch.intel.com>

On 11-04-22, 15:11, Dave Jiang wrote:
> Load the max_xfer_size and max_batch_size values from the values read from
> registers to the shadow variables. This will allow the read-only device to
> display the correct values for the sysfs attributes.

Applied, thanks

> 
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> ---
>  drivers/dma/idxd/device.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c
> index f652da6ab47d..95c8c7d8d419 100644
> --- a/drivers/dma/idxd/device.c
> +++ b/drivers/dma/idxd/device.c
> @@ -1018,6 +1018,9 @@ static int idxd_wq_load_config(struct idxd_wq *wq)
>  
>  	wq->priority = wq->wqcfg->priority;
>  
> +	wq->max_xfer_bytes = 1ULL << wq->wqcfg->max_xfer_shift;
> +	wq->max_batch_size = 1ULL << wq->wqcfg->max_batch_shift;
> +
>  	for (i = 0; i < WQCFG_STRIDES(idxd); i++) {
>  		wqcfg_offset = WQCFG_OFFSET(idxd, wq->id, i);
>  		dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n", wq->id, i, wqcfg_offset, wq->wqcfg->bits[i]);
> 

-- 
~Vinod

      reply	other threads:[~2022-04-20 11:48 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-11 22:11 [PATCH] dmaengine: idxd: set max_xfer and max_batch for RO device Dave Jiang
2022-04-20 11:48 ` Vinod Koul [this message]

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