[PATCH 1/3] dmaengine: qcom: gpi: set chain and link flag for duplex

[PATCH 1/3] dmaengine: qcom: gpi: set chain and link flag for duplex

[Vinod Koul]

Newer platforms seem to have strict requirement for TRE flags which
causes transaction to timeout. This was resolved to missing chain and
link flag for duplex spi transaction.

So add these two flags.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 drivers/dma/qcom/gpi.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c
index 94f3648f7483..3429ceccd13b 100644
--- a/drivers/dma/qcom/gpi.c
+++ b/drivers/dma/qcom/gpi.c
@@ -1754,10 +1754,14 @@ static int gpi_create_spi_tre(struct gchan *chan, struct gpi_desc *desc,
 		tre->dword[2] = u32_encode_bits(spi->rx_len, TRE_RX_LEN);
 
 		tre->dword[3] = u32_encode_bits(TRE_TYPE_GO, TRE_FLAGS_TYPE);
-		if (spi->cmd == SPI_RX)
+		if (spi->cmd == SPI_RX) {
 			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_IEOB);
-		else
+		} else if (spi->cmd == SPI_TX) {
+			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_CHAIN);
+		} else { /* SPI_DUPLEX */
 			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_CHAIN);
+			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_LINK);
+		}
 	}
 
 	/* create the dma tre */
-- 
2.34.1

[PATCH 2/3] dt-bindings: dmaengine: qcom: gpi: add compatible for sm8350/sm8350

[Vinod Koul]

Add the compatible for newer qcom socs with gpi dma i.e qcom sm8350 and
sm8450.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
index e614fe3187bb..67f046a4a442 100644
--- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
+++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
@@ -22,6 +22,8 @@ properties:
       - qcom,sdm845-gpi-dma
       - qcom,sm8150-gpi-dma
       - qcom,sm8250-gpi-dma
+      - qcom,sm8350-gpi-dma
+      - qcom,sm8450-gpi-dma
 
   reg:
     maxItems: 1
-- 
2.34.1

Re: [PATCH 2/3] dt-bindings: dmaengine: qcom: gpi: add compatible for sm8350/sm8350

[Krzysztof Kozlowski]

On 06/04/2022 15:25, Vinod Koul wrote:
> Add the compatible for newer qcom socs with gpi dma i.e qcom sm8350 and
> sm8450.
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>  Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

Re: [PATCH 2/3] dt-bindings: dmaengine: qcom: gpi: add compatible for sm8350/sm8350

[Bjorn Andersson]

On Wed 06 Apr 06:25 PDT 2022, Vinod Koul wrote:

> Add the compatible for newer qcom socs with gpi dma i.e qcom sm8350 and
> sm8450.
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---
>  Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
> index e614fe3187bb..67f046a4a442 100644
> --- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
> +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
> @@ -22,6 +22,8 @@ properties:
>        - qcom,sdm845-gpi-dma
>        - qcom,sm8150-gpi-dma
>        - qcom,sm8250-gpi-dma
> +      - qcom,sm8350-gpi-dma
> +      - qcom,sm8450-gpi-dma
>  
>    reg:
>      maxItems: 1
> -- 
> 2.34.1
> 

[PATCH 3/3] dmaengine: qcom: gpi: Add support for ee_offset

[Vinod Koul]

Controller on newer SoCs like SM8450 have registers at at offset. Add
ee_offset to driver_data and add this compatible for the driver.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 drivers/dma/qcom/gpi.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c
index 3429ceccd13b..0b402d923eae 100644
--- a/drivers/dma/qcom/gpi.c
+++ b/drivers/dma/qcom/gpi.c
@@ -2152,6 +2152,7 @@ static int gpi_probe(struct platform_device *pdev)
 {
 	struct gpi_dev *gpi_dev;
 	unsigned int i;
+	u32 ee_offset;
 	int ret;
 
 	gpi_dev = devm_kzalloc(&pdev->dev, sizeof(*gpi_dev), GFP_KERNEL);
@@ -2179,6 +2180,9 @@ static int gpi_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	ee_offset = (uintptr_t)device_get_match_data(gpi_dev->dev);
+	gpi_dev->ee_base = gpi_dev->ee_base - ee_offset;
+
 	gpi_dev->ev_factor = EV_FACTOR;
 
 	ret = dma_set_mask(gpi_dev->dev, DMA_BIT_MASK(64));
@@ -2282,9 +2286,10 @@ static int gpi_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id gpi_of_match[] = {
-	{ .compatible = "qcom,sdm845-gpi-dma" },
-	{ .compatible = "qcom,sm8150-gpi-dma" },
-	{ .compatible = "qcom,sm8250-gpi-dma" },
+	{ .compatible = "qcom,sdm845-gpi-dma", .data = (void *)0x0 },
+	{ .compatible = "qcom,sm8150-gpi-dma", .data = (void *)0x0 },
+	{ .compatible = "qcom,sm8250-gpi-dma", .data = (void *)0x0 },
+	{ .compatible = "qcom,sm8450-gpi-dma", .data = (void *)0x10000 },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, gpi_of_match);
-- 
2.34.1

Re: [PATCH 3/3] dmaengine: qcom: gpi: Add support for ee_offset

[Bjorn Andersson]

On Wed 06 Apr 06:25 PDT 2022, Vinod Koul wrote:

> Controller on newer SoCs like SM8450 have registers at at offset. Add
> ee_offset to driver_data and add this compatible for the driver.
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Regards,
Bjorn

> ---
>  drivers/dma/qcom/gpi.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c
> index 3429ceccd13b..0b402d923eae 100644
> --- a/drivers/dma/qcom/gpi.c
> +++ b/drivers/dma/qcom/gpi.c
> @@ -2152,6 +2152,7 @@ static int gpi_probe(struct platform_device *pdev)
>  {
>  	struct gpi_dev *gpi_dev;
>  	unsigned int i;
> +	u32 ee_offset;
>  	int ret;
>  
>  	gpi_dev = devm_kzalloc(&pdev->dev, sizeof(*gpi_dev), GFP_KERNEL);
> @@ -2179,6 +2180,9 @@ static int gpi_probe(struct platform_device *pdev)
>  		return ret;
>  	}
>  
> +	ee_offset = (uintptr_t)device_get_match_data(gpi_dev->dev);
> +	gpi_dev->ee_base = gpi_dev->ee_base - ee_offset;
> +
>  	gpi_dev->ev_factor = EV_FACTOR;
>  
>  	ret = dma_set_mask(gpi_dev->dev, DMA_BIT_MASK(64));
> @@ -2282,9 +2286,10 @@ static int gpi_probe(struct platform_device *pdev)
>  }
>  
>  static const struct of_device_id gpi_of_match[] = {
> -	{ .compatible = "qcom,sdm845-gpi-dma" },
> -	{ .compatible = "qcom,sm8150-gpi-dma" },
> -	{ .compatible = "qcom,sm8250-gpi-dma" },
> +	{ .compatible = "qcom,sdm845-gpi-dma", .data = (void *)0x0 },
> +	{ .compatible = "qcom,sm8150-gpi-dma", .data = (void *)0x0 },
> +	{ .compatible = "qcom,sm8250-gpi-dma", .data = (void *)0x0 },
> +	{ .compatible = "qcom,sm8450-gpi-dma", .data = (void *)0x10000 },
>  	{ },
>  };
>  MODULE_DEVICE_TABLE(of, gpi_of_match);
> -- 
> 2.34.1
> 

Re: [PATCH 1/3] dmaengine: qcom: gpi: set chain and link flag for duplex

[Bjorn Andersson]

On Wed 06 Apr 06:25 PDT 2022, Vinod Koul wrote:

> Newer platforms seem to have strict requirement for TRE flags which
> causes transaction to timeout. This was resolved to missing chain and
> link flag for duplex spi transaction.
> 
> So add these two flags.
> 
> Signed-off-by: Vinod Koul <vkoul@kernel.org>

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---
>  drivers/dma/qcom/gpi.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c
> index 94f3648f7483..3429ceccd13b 100644
> --- a/drivers/dma/qcom/gpi.c
> +++ b/drivers/dma/qcom/gpi.c
> @@ -1754,10 +1754,14 @@ static int gpi_create_spi_tre(struct gchan *chan, struct gpi_desc *desc,
>  		tre->dword[2] = u32_encode_bits(spi->rx_len, TRE_RX_LEN);
>  
>  		tre->dword[3] = u32_encode_bits(TRE_TYPE_GO, TRE_FLAGS_TYPE);
> -		if (spi->cmd == SPI_RX)
> +		if (spi->cmd == SPI_RX) {
>  			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_IEOB);
> -		else
> +		} else if (spi->cmd == SPI_TX) {
> +			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_CHAIN);
> +		} else { /* SPI_DUPLEX */
>  			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_CHAIN);
> +			tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_LINK);
> +		}
>  	}
>  
>  	/* create the dma tre */
> -- 
> 2.34.1
> 

Re: [PATCH 1/3] dmaengine: qcom: gpi: set chain and link flag for duplex

[Vinod Koul]

On 06-04-22, 18:55, Vinod Koul wrote:
> Newer platforms seem to have strict requirement for TRE flags which
> causes transaction to timeout. This was resolved to missing chain and
> link flag for duplex spi transaction.
> 
> So add these two flags.

Applied all, thanks

-- 
~Vinod