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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?2777uTal1KQ9wLsuuTOFybfRIYDGZjpS5Pvnm2eyasmApvxkhrqg4E2SCIUP?= =?us-ascii?Q?XtcKe1fjyOlJnBteiqo1fpg29dJMoZdh9O0aDiIDzwsq+DXLmIae5iosCVPa?= =?us-ascii?Q?oM/X9QK3emCCN2muPbPFdHFCtJOOYB6dIjdXo8W81oP1GfesIaYwPAQFzoqw?= =?us-ascii?Q?MpdcbRBfQ5bC94HqLXDmXr/6lWyn5o+k7Dh1A0EUco8yYG7ntLMpJUmF0QV6?= =?us-ascii?Q?eiPgSjC5gNnr463HoOL+Oew3Ed+CkfDVFkN2HyZ4VNpekRb218o27Uy1bwwO?= =?us-ascii?Q?9oRhkRguJrZQIQ/H9EWLojSfBH9btDF6GSvYMKML1pjImIstoKUc/O3Q+m61?= =?us-ascii?Q?mqcz9cfPkS8LZUneaA43tS5tTX7u1cClCotBVkgY0L1FNw8mKi3KPKBh9q87?= =?us-ascii?Q?FaUni9KGvHumVEVR/RUp3ZAtPIm7JxAMZAkFPB0ukV3zyniT/kCAh+51OZLM?= =?us-ascii?Q?CR/DMp5V4oL9dU2khzX58igGbhHEX8PR29qL8H8Y6xq2aBXlnU+365Iw0A7r?= =?us-ascii?Q?7Ry0efQWJTte4eDxbqHkDiUmsxzMgOJDBsWN+jjPbbSZkxXcsLjoB59LSvXk?= =?us-ascii?Q?+gFbhx4w8GAcA7smVRjwUUjqrdaendlMv6a/Mw+qH8+0ZReHZiLWeZiY/GtV?= =?us-ascii?Q?NcPaqp4xRqP3KVsDG7z1OymgS1HEDOnaXJhGAHeeeTBBAsQQEMr6pk9yvxBD?= =?us-ascii?Q?7Ukjpl7VZRkL/GbH1DJQDmuiGPv0s0JWvYapf6ZcTtFxTzWpjmFB5BbRI4hp?= =?us-ascii?Q?sR1+DHIPKwtvQrxZnEV9AOH2PJDjM3E/XUty4saaaaLLM3EvRmS3ihq56VfH?= =?us-ascii?Q?yfTQhj6xLenkmv8Zh1n8Lk0uKFo296W2b0kQdA1jT8E8gELZ7/UX+CiQVcM6?= =?us-ascii?Q?wNUNze94f7WiQsrMIfaC0HtZGyBbZjg6bsbpCxy/gKVj25aUyujinK9IVaaG?= =?us-ascii?Q?N1XuthVEDrKFvom08CSfbsvIFWw8Tgq7gk9JdbUydHq9Zh5luk/S8HWcb1e9?= =?us-ascii?Q?IPEtl4TgB9cF33MTzAZDopFWdiYXTdPQMrAh/xywIbwMJdC4PSbZ+ae1XDVs?= =?us-ascii?Q?Y8YnFENyTM+67MU2CZgHTkNMaiqNYJh3flyr9d1iKiFfHqVEYcAGdPLYO5/5?= =?us-ascii?Q?n+UiorM5gLnw2Sx9OuW6K6WXqw5/P9ms2dhylrN4PShFDU7LEuqdiFI9dkMa?= =?us-ascii?Q?SzPovSPRtOfeCWAwOI9nX11+w0WzJp5qimg9GpwlEBGmT/go8DBv9qAGxz6m?= =?us-ascii?Q?A3LoTmTwyRsinj+qg9TYUBKnoQvnI+KMtC1jeocY5q6H3NaSQ6EvLw2vkaC2?= =?us-ascii?Q?JvLuZU2TpYus72t4KFnT2WTGYfJIyZK9uxKeuPQHN5JR3xvQXlArP76WRPQw?= =?us-ascii?Q?M818zW1mVVW9NRUycShf95QqPf7zkg0euMeF/NbTleXSG8gWLpAX5bk304lD?= =?us-ascii?Q?3l4Cx2gTVRxnVq0UIj2EdxkN0NpIIlDw2rST1UpbRoyq58Gcvwa39IyS5L9w?= =?us-ascii?Q?cFvpvxSVfnvMUjrs40TVQ/AZZeW5R/9tMo6t9EIePqvBEELj9NtGLqnocxlK?= =?us-ascii?Q?mQbyEhJyjvxZ7/u06z1utBKeV9lrKYaFU5kGB1o2?= X-MS-Exchange-CrossTenant-Network-Message-Id: 9f01ca43-a595-499f-425f-08db37343082 X-MS-Exchange-CrossTenant-AuthSource: MN0PR11MB6206.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Apr 2023 06:49:09.6793 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: /shSGRhFiAdtn0nVu0yg9X2ONdCN6yJkiOsVkO9SqzUKuZlr99pHTqUYgQU0MxIs2jksql12NKSS6+TXbTgJvw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR11MB6938 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org On 2023-04-04 at 23:39:45 +0800, Libing Lei wrote: > When multiple channels operate simultaneously, the common register shared > by all channels could be set to an unexpected value due to race conditions Does the channel mean the "chip" in the following patch? I mean, each channel has 1 chip plugged in? I asked this question because I'm trying to figure out the protection scope of the introduced spinlock. > on SMP machines, resulting in a disaster that DMAC cannot work from then > on: > > cpu0 cpu1 > dw_axi_dma_interrupt() > axi_dma_irq_disable(chip) > ... > axi_chan_block_xfer_start() > axi_dma_enable() > val = axi_dma_ioread32(chip, DMAC_CFG) > axi_dma_irq_enable(chip) > axi_dma_iowrite32(chip, DMAC_CFG, val) > > As a result, the global interrupt enable bit INT_EN in the DMAC_CFG > register is eventually cleared and the DMAC will no longer generates > interrupts. > > The error scenario is as follows: > > [ 63.483688] dmatest: dma0chan1-copy: result #18: 'test timed out' with > src_off=0xc2 dst_off=0x27b len=0x3a54 (0) > [ 63.483693] dmatest: dma0chan2-copy: result #18: 'test timed out' with > src_off=0x239 dst_off=0xfc9 len=0x213a (0) > [ 63.483696] dmatest: dma0chan0-copy: result #19: 'test timed out' with > src_off=0x5d1 dst_off=0x231 len=0x395e (0) > > a spinlock is added to fix it up. > Although it is unlikely to introduce ABBA lock, maybe enabling the CONFIG_LOCKDEP to have a double check on this. > Signed-off-by: Libing Lei The patch looks good to me. thanks, Chenyu