* [PATCH v2 1/2] dmaengine: idxd: reformat swerror output to standard Linux bitmap output
2023-03-03 21:37 [PATCH v2 0/2] Expose IAA 2.0 device capabilities Fenghua Yu
@ 2023-03-03 21:37 ` Fenghua Yu
2023-03-03 21:37 ` [PATCH v2 2/2] dmaengine: idxd: expose IAA CAP register via sysfs knob Fenghua Yu
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Fenghua Yu @ 2023-03-03 21:37 UTC (permalink / raw)
To: Vinod Koul, Dave Jiang; +Cc: dmaengine, linux-kernel, Fenghua Yu
From: Dave Jiang <dave.jiang@intel.com>
SWERROR register is 4 64bit wide registers. Currently the sysfs attribute
just outputs 4 64bit hex integers. Convert to output with %*pb format
specifier.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Co-developed-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
---
v2:
- Fix a typo in commit message (Vinod)
drivers/dma/idxd/idxd.h | 1 +
drivers/dma/idxd/init.c | 2 +-
drivers/dma/idxd/sysfs.c | 10 ++++------
3 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h
index 7ced8d283d98..ad7a1e8a0e1c 100644
--- a/drivers/dma/idxd/idxd.h
+++ b/drivers/dma/idxd/idxd.h
@@ -598,6 +598,7 @@ int idxd_register_driver(void);
void idxd_unregister_driver(void);
void idxd_wqs_quiesce(struct idxd_device *idxd);
bool idxd_queue_int_handle_resubmit(struct idxd_desc *desc);
+void multi_u64_to_bmap(unsigned long *bmap, u64 *val, int count);
/* device interrupt control */
irqreturn_t idxd_misc_thread(int vec, void *data);
diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c
index 640d3048368e..68d1c7fc9112 100644
--- a/drivers/dma/idxd/init.c
+++ b/drivers/dma/idxd/init.c
@@ -389,7 +389,7 @@ static void idxd_read_table_offsets(struct idxd_device *idxd)
dev_dbg(dev, "IDXD Perfmon Offset: %#x\n", idxd->perfmon_offset);
}
-static void multi_u64_to_bmap(unsigned long *bmap, u64 *val, int count)
+void multi_u64_to_bmap(unsigned long *bmap, u64 *val, int count)
{
int i, j, nr;
diff --git a/drivers/dma/idxd/sysfs.c b/drivers/dma/idxd/sysfs.c
index 18cd8151dee0..927c9d645121 100644
--- a/drivers/dma/idxd/sysfs.c
+++ b/drivers/dma/idxd/sysfs.c
@@ -1452,15 +1452,13 @@ static ssize_t errors_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct idxd_device *idxd = confdev_to_idxd(dev);
- int i, out = 0;
+ DECLARE_BITMAP(swerr_bmap, 256);
+ bitmap_zero(swerr_bmap, 256);
spin_lock(&idxd->dev_lock);
- for (i = 0; i < 4; i++)
- out += sysfs_emit_at(buf, out, "%#018llx ", idxd->sw_err.bits[i]);
+ multi_u64_to_bmap(swerr_bmap, &idxd->sw_err.bits[0], 4);
spin_unlock(&idxd->dev_lock);
- out--;
- out += sysfs_emit_at(buf, out, "\n");
- return out;
+ return sysfs_emit(buf, "%*pb\n", 256, swerr_bmap);
}
static DEVICE_ATTR_RO(errors);
--
2.37.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v2 2/2] dmaengine: idxd: expose IAA CAP register via sysfs knob
2023-03-03 21:37 [PATCH v2 0/2] Expose IAA 2.0 device capabilities Fenghua Yu
2023-03-03 21:37 ` [PATCH v2 1/2] dmaengine: idxd: reformat swerror output to standard Linux bitmap output Fenghua Yu
@ 2023-03-03 21:37 ` Fenghua Yu
2023-03-29 2:01 ` [PATCH v2 0/2] Expose IAA 2.0 device capabilities Fenghua Yu
2023-03-31 11:57 ` Vinod Koul
3 siblings, 0 replies; 6+ messages in thread
From: Fenghua Yu @ 2023-03-03 21:37 UTC (permalink / raw)
To: Vinod Koul, Dave Jiang; +Cc: dmaengine, linux-kernel, Fenghua Yu
From: Dave Jiang <dave.jiang@intel.com>
Add IAA (IAX) capability mask sysfs attribute to expose to applications.
The mask provides application knowledge of what capabilities this IAA
device supports. This mask is available for IAA 2.0 device or later.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Co-developed-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
---
.../ABI/stable/sysfs-driver-dma-idxd | 8 +++++++
drivers/dma/idxd/idxd.h | 1 +
drivers/dma/idxd/init.c | 4 ++++
drivers/dma/idxd/registers.h | 21 ++++++++++++++++
drivers/dma/idxd/sysfs.c | 24 +++++++++++++++++++
5 files changed, 58 insertions(+)
diff --git a/Documentation/ABI/stable/sysfs-driver-dma-idxd b/Documentation/ABI/stable/sysfs-driver-dma-idxd
index 3becc9a82bdf..d5e3dd3d8434 100644
--- a/Documentation/ABI/stable/sysfs-driver-dma-idxd
+++ b/Documentation/ABI/stable/sysfs-driver-dma-idxd
@@ -136,6 +136,14 @@ Description: The last executed device administrative command's status/error.
Also last configuration error overloaded.
Writing to it will clear the status.
+What: /sys/bus/dsa/devices/dsa<m>/iaa_cap
+Date: Sept 14, 2022
+KernelVersion: 6.0.0
+Contact: dmaengine@vger.kernel.org
+Description: IAA (IAX) capability mask. Exported to user space for application
+ consumption. This attribute should only be visible on IAA devices
+ that are version 2 or later.
+
What: /sys/bus/dsa/devices/wq<m>.<n>/block_on_fault
Date: Oct 27, 2020
KernelVersion: 5.11.0
diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h
index ad7a1e8a0e1c..eca2c9d76db6 100644
--- a/drivers/dma/idxd/idxd.h
+++ b/drivers/dma/idxd/idxd.h
@@ -232,6 +232,7 @@ struct idxd_hw {
union engine_cap_reg engine_cap;
struct opcap opcap;
u32 cmd_cap;
+ union iaa_cap_reg iaa_cap;
};
enum idxd_device_state {
diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c
index 68d1c7fc9112..a408fc91144d 100644
--- a/drivers/dma/idxd/init.c
+++ b/drivers/dma/idxd/init.c
@@ -461,6 +461,10 @@ static void idxd_read_caps(struct idxd_device *idxd)
dev_dbg(dev, "opcap[%d]: %#llx\n", i, idxd->hw.opcap.bits[i]);
}
multi_u64_to_bmap(idxd->opcap_bmap, &idxd->hw.opcap.bits[0], 4);
+
+ /* read iaa cap */
+ if (idxd->data->type == IDXD_TYPE_IAX && idxd->hw.version >= DEVICE_VERSION_2)
+ idxd->hw.iaa_cap.bits = ioread64(idxd->reg_base + IDXD_IAACAP_OFFSET);
}
static struct idxd_device *idxd_alloc(struct pci_dev *pdev, struct idxd_driver_data *data)
diff --git a/drivers/dma/idxd/registers.h b/drivers/dma/idxd/registers.h
index fe3b8d04f9db..338289a66f00 100644
--- a/drivers/dma/idxd/registers.h
+++ b/drivers/dma/idxd/registers.h
@@ -276,6 +276,27 @@ union sw_err_reg {
u64 bits[4];
} __packed;
+union iaa_cap_reg {
+ struct {
+ u64 dec_aecs_format_ver:1;
+ u64 drop_init_bits:1;
+ u64 chaining:1;
+ u64 force_array_output_mod:1;
+ u64 load_part_aecs:1;
+ u64 comp_early_abort:1;
+ u64 nested_comp:1;
+ u64 diction_comp:1;
+ u64 header_gen:1;
+ u64 crypto_gcm:1;
+ u64 crypto_cfb:1;
+ u64 crypto_xts:1;
+ u64 rsvd:52;
+ };
+ u64 bits;
+} __packed;
+
+#define IDXD_IAACAP_OFFSET 0x180
+
union msix_perm {
struct {
u32 rsvd:2;
diff --git a/drivers/dma/idxd/sysfs.c b/drivers/dma/idxd/sysfs.c
index 927c9d645121..2eba8cab25a1 100644
--- a/drivers/dma/idxd/sysfs.c
+++ b/drivers/dma/idxd/sysfs.c
@@ -1561,6 +1561,18 @@ static ssize_t cmd_status_store(struct device *dev, struct device_attribute *att
}
static DEVICE_ATTR_RW(cmd_status);
+static ssize_t iaa_cap_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct idxd_device *idxd = confdev_to_idxd(dev);
+
+ if (idxd->hw.version < DEVICE_VERSION_2)
+ return -EOPNOTSUPP;
+
+ return sysfs_emit(buf, "%#llx\n", idxd->hw.iaa_cap.bits);
+}
+static DEVICE_ATTR_RO(iaa_cap);
+
static bool idxd_device_attr_max_batch_size_invisible(struct attribute *attr,
struct idxd_device *idxd)
{
@@ -1583,6 +1595,14 @@ static bool idxd_device_attr_read_buffers_invisible(struct attribute *attr,
idxd->data->type == IDXD_TYPE_IAX;
}
+static bool idxd_device_attr_iaa_cap_invisible(struct attribute *attr,
+ struct idxd_device *idxd)
+{
+ return attr == &dev_attr_iaa_cap.attr &&
+ (idxd->data->type != IDXD_TYPE_IAX ||
+ idxd->hw.version < DEVICE_VERSION_2);
+}
+
static umode_t idxd_device_attr_visible(struct kobject *kobj,
struct attribute *attr, int n)
{
@@ -1595,6 +1615,9 @@ static umode_t idxd_device_attr_visible(struct kobject *kobj,
if (idxd_device_attr_read_buffers_invisible(attr, idxd))
return 0;
+ if (idxd_device_attr_iaa_cap_invisible(attr, idxd))
+ return 0;
+
return attr->mode;
}
@@ -1620,6 +1643,7 @@ static struct attribute *idxd_device_attributes[] = {
&dev_attr_read_buffer_limit.attr,
&dev_attr_cdev_major.attr,
&dev_attr_cmd_status.attr,
+ &dev_attr_iaa_cap.attr,
NULL,
};
--
2.37.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v2 0/2] Expose IAA 2.0 device capabilities
2023-03-03 21:37 [PATCH v2 0/2] Expose IAA 2.0 device capabilities Fenghua Yu
2023-03-03 21:37 ` [PATCH v2 1/2] dmaengine: idxd: reformat swerror output to standard Linux bitmap output Fenghua Yu
2023-03-03 21:37 ` [PATCH v2 2/2] dmaengine: idxd: expose IAA CAP register via sysfs knob Fenghua Yu
@ 2023-03-29 2:01 ` Fenghua Yu
2023-03-31 11:57 ` Vinod Koul
3 siblings, 0 replies; 6+ messages in thread
From: Fenghua Yu @ 2023-03-29 2:01 UTC (permalink / raw)
To: Vinod Koul, Dave Jiang; +Cc: dmaengine, linux-kernel
Hi, Vinod,
On 3/3/23 13:37, Fenghua Yu wrote:
> In-memory Analytics Accelerator (IAA) 2.0 [1] introduces General
> Capabilities Register (GENCAP). Add a sysfs attribute to expose the
> register to applications.
>
> This series is applied cleanly on top of DSA 2.0 Event Log and Completion
> Record Faulting series:
> https://lore.kernel.org/dmaengine/20230103163505.1569356-1-fenghua.yu@intel.com/T/#m13ba6167994f3add6446d2d7e242ecb637c54426
Correction: this series does not depend on DSA 2.0 Event Log and
Completion Record Faulting series. This series itself can be applied
cleanly on top of upstream kernel.
Any comment on this series? Will you pick it up?
Thank you very much!
-Fenghua
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 0/2] Expose IAA 2.0 device capabilities
2023-03-03 21:37 [PATCH v2 0/2] Expose IAA 2.0 device capabilities Fenghua Yu
` (2 preceding siblings ...)
2023-03-29 2:01 ` [PATCH v2 0/2] Expose IAA 2.0 device capabilities Fenghua Yu
@ 2023-03-31 11:57 ` Vinod Koul
2023-03-31 15:57 ` Fenghua Yu
3 siblings, 1 reply; 6+ messages in thread
From: Vinod Koul @ 2023-03-31 11:57 UTC (permalink / raw)
To: Fenghua Yu; +Cc: Dave Jiang, dmaengine, linux-kernel
On 03-03-23, 13:37, Fenghua Yu wrote:
> In-memory Analytics Accelerator (IAA) 2.0 [1] introduces General
> Capabilities Register (GENCAP). Add a sysfs attribute to expose the
> register to applications.
>
> This series is applied cleanly on top of DSA 2.0 Event Log and Completion
> Record Faulting series:
> https://lore.kernel.org/dmaengine/20230103163505.1569356-1-fenghua.yu@intel.com/T/#m13ba6167994f3add6446d2d7e242ecb637c54426
Applied, thanks
--
~Vinod
^ permalink raw reply [flat|nested] 6+ messages in thread