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From: Jason Gunthorpe <jgg@nvidia.com>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>,
	LKML <linux-kernel@vger.kernel.org>,
	"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	Joerg Roedel <joro@8bytes.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.com>,
	"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
	"vkoul@kernel.org" <vkoul@kernel.org>,
	Will Deacon <will@kernel.org>,
	David Woodhouse <dwmw2@infradead.org>,
	"Raj, Ashok" <ashok.raj@intel.com>,
	"Liu, Yi L" <yi.l.liu@intel.com>,
	"Yu, Fenghua" <fenghua.yu@intel.com>,
	"Jiang, Dave" <dave.jiang@intel.com>,
	"Luck, Tony" <tony.luck@intel.com>,
	"Zanussi, Tom" <tom.zanussi@intel.com>,
	"Ranganathan, Narayan" <narayan.ranganathan@intel.com>
Subject: Re: [PATCH v7 3/4] iommu/vt-d: Add set_dev_pasid callback for dma domain
Date: Tue, 30 May 2023 14:08:34 -0300	[thread overview]
Message-ID: <ZHYtkioNR2YfC18C@nvidia.com> (raw)
In-Reply-To: <BN9PR11MB52760139A4844C8DF0EE1BE98C469@BN9PR11MB5276.namprd11.prod.outlook.com>

> > +	/*
> > +	 * The SVA implementation needs to stop mm notification, drain the
> > +	 * pending page fault requests before tearing down the pasid entry.
> > +	 * The VT-d spec (section 6.2.3.1) also recommends that software
> > +	 * could use a reserved domain id for all first-only and pass-through
> > +	 * translations. Hence there's no need to call
> > domain_detach_iommu()
> > +	 * in the sva domain case.
> > +	 */
> 
> It's probably clearer to say:

Is this what is going on ??

> /*
>  * SVA domain requires special treatment before tearing down the pasid
>  * entry:
>  *   1) pasid is stored in mm instead of in dev_pasid;

Why? The mm pasid should not be used by any driver code, the PASID the
SVA is hooked to does NOT have to be the mm PASID.

>  *   2) all SVA domains share a reserved domain id per recommendation
>  *      from VT-d spec (section 6.2.3.1) so domain_detach_iommu() is
>  *      not required;

The DID should be managed and allocated for the S2 pointer and the
flushing logic should work genericly by tracking the S2's being used
and flushing their DIDs when all the S2s fall out of use. The special
identity S2 just gets a static DID that never falls out of use.

Jason

  parent reply	other threads:[~2023-05-30 17:08 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-23 17:34 [PATCH v7 0/4] Re-enable IDXD kernel workqueue under DMA API Jacob Pan
2023-05-23 17:34 ` [PATCH v7 1/4] iommu: Generalize PASID 0 for normal DMA w/o PASID Jacob Pan
2023-05-25  6:25   ` Tian, Kevin
2023-06-01  4:31   ` Jacob Pan
2023-06-01  9:26   ` Jean-Philippe Brucker
2023-06-01 14:21     ` Jacob Pan
2023-05-23 17:34 ` [PATCH v7 2/4] iommu: Move global PASID allocation from SVA to core Jacob Pan
2023-05-25  6:27   ` Tian, Kevin
2023-05-25 15:54     ` Jacob Pan
2023-05-23 17:34 ` [PATCH v7 3/4] iommu/vt-d: Add set_dev_pasid callback for dma domain Jacob Pan
2023-05-25  6:56   ` Tian, Kevin
2023-05-26  2:43     ` Baolu Lu
2023-06-14  8:10       ` Tian, Kevin
2023-05-30 17:08     ` Jason Gunthorpe [this message]
2023-05-31  4:59       ` Baolu Lu
2023-06-14  8:13       ` Tian, Kevin
2023-05-23 17:34 ` [PATCH v7 4/4] dmaengine/idxd: Re-enable kernel workqueue under DMA API Jacob Pan
2023-05-24  5:44   ` Vinod Koul
2023-06-01  4:33 ` [PATCH v7 0/4] Re-enable IDXD " Jacob Pan
2023-06-01 14:21   ` Jason Gunthorpe
2023-06-01 15:58     ` Jacob Pan

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