[PATCH 1/4] dmaengine: fsl-edma: fix eDMAv4 channel allocation issue

Frank Li
2023-11-14T15:48:49Z

The eDMAv4 channel mux has a limitation where certain requests must use
even channels, while others must use odd numbers.

Add two flags (ARGS_EVEN_CH and ARGS_ODD_CH) to reflect this limitation.
The device tree source (dts) files need to be updated accordingly.

This issue was identified by the following commit:
commit a725990557e7 ("arm64: dts: imx93: Fix the dmas entries order")

Reverting channel orders triggered this problem.

Fixes: 72f5801a4e2b ("dmaengine: fsl-edma: integrate v3 support")
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
drivers/dma/fsl-edma-main.c | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c
index 4635e16d7705e..3ee08f390f810 100644
--- a/drivers/dma/fsl-edma-main.c
+++ b/drivers/dma/fsl-edma-main.c
@@ -24,6 +24,8 @@
#define ARGS_RX BIT(0)
#define ARGS_REMOTE BIT(1)
#define ARGS_MULTI_FIFO BIT(2)
+#define ARGS_EVEN_CH BIT(3)
+#define ARGS_ODD_CH BIT(4)

static void fsl_edma_synchronize(struct dma_chan *chan)
{
@@ -157,6 +159,12 @@ static struct dma_chan *fsl_edma3_xlate(struct of_phandle_args *dma_spec,
fsl_chan->is_remote = dma_spec->args[2] & ARGS_REMOTE;
fsl_chan->is_multi_fifo = dma_spec->args[2] & ARGS_MULTI_FIFO;

+ if ((dma_spec->args[2] & ARGS_EVEN_CH) && (i & 0x1))
+ continue;
+
+ if ((dma_spec->args[2] & ARGS_ODD_CH) && !(i & 0x1))
+ continue;
+
if (!b_chmux && i == dma_spec->args[0]) {
chan = dma_get_slave_channel(chan);
chan->device->privatecnt++;
--
2.34.1