From: Vinod Koul <vkoul@kernel.org>
To: "Verma, Devendra" <Devendra.Verma@amd.com>
Cc: "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"mani@kernel.org" <mani@kernel.org>
Subject: Re: [RESEND PATCH] dmaengine: dw-edma: Add Simple Mode Support
Date: Wed, 23 Jul 2025 12:50:34 +0530 [thread overview]
Message-ID: <aICNQuhw3SrZJrYS@vaman> (raw)
In-Reply-To: <SA1PR12MB81208BAD2A5D264482333FF79540A@SA1PR12MB8120.namprd12.prod.outlook.com>
On 02-07-25, 09:38, Verma, Devendra wrote:
> > On 23-06-25, 11:47, Devendra K Verma wrote:
> > > The HDMA IP supports the simple mode (non-linked list).
> > > In this mode the channel registers are configured to initiate a single
> > > DMA data transfer. The channel can be configured in simple mode via
> > > peripheral param of dma_slave_config param.
> > >
> > > Signed-off-by: Devendra K Verma <devverma@amd.com>
> > > ---
> > > drivers/dma/dw-edma/dw-edma-core.c | 10 +++++
> > > drivers/dma/dw-edma/dw-edma-core.h | 2 +
> > > drivers/dma/dw-edma/dw-hdma-v0-core.c | 53
> > ++++++++++++++++++++++++++-
> > > include/linux/dma/edma.h | 8 ++++
> > > 4 files changed, 72 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/dma/dw-edma/dw-edma-core.c
> > > b/drivers/dma/dw-edma/dw-edma-core.c
> > > index c2b88cc99e5d..4dafd6554277 100644
> > > --- a/drivers/dma/dw-edma/dw-edma-core.c
> > > +++ b/drivers/dma/dw-edma/dw-edma-core.c
> > > @@ -235,9 +235,19 @@ static int dw_edma_device_config(struct dma_chan
> > *dchan,
> > > struct dma_slave_config *config) {
> > > struct dw_edma_chan *chan = dchan2dw_edma_chan(dchan);
> > > + struct dw_edma_peripheral_config *pconfig = config->peripheral_config;
> > > + unsigned long flags;
> > > +
> > > + if (WARN_ON(config->peripheral_config &&
> > > + config->peripheral_size != sizeof(*pconfig)))
> > > + return -EINVAL;
> > >
> > > + spin_lock_irqsave(&chan->vc.lock, flags);
> > > memcpy(&chan->config, config, sizeof(*config));
> > > +
> > > + chan->non_ll_en = pconfig ? pconfig->non_ll_en : false;
> > > chan->configured = true;
> > > + spin_unlock_irqrestore(&chan->vc.lock, flags);
> > >
> > > return 0;
> > > }
> > > diff --git a/drivers/dma/dw-edma/dw-edma-core.h
> > > b/drivers/dma/dw-edma/dw-edma-core.h
> > > index 71894b9e0b15..c0266976aa22 100644
> > > --- a/drivers/dma/dw-edma/dw-edma-core.h
> > > +++ b/drivers/dma/dw-edma/dw-edma-core.h
> > > @@ -86,6 +86,8 @@ struct dw_edma_chan {
> > > u8 configured;
> > >
> > > struct dma_slave_config config;
> > > +
> > > + bool non_ll_en;
> >
> > why do you need this? What is the decision to use non ll vs ll one?
>
> The IP supports both the modes, LL mode and non-LL mode.
> In the current driver code, the support for non-LL mode is not
> present. This patch enables the non-LL aka simple mode support
> by means of the peripheral_config option in the dmaengine_slave_config.
That does not answer my question, what decides which mode should be
used?
--
~Vinod
next prev parent reply other threads:[~2025-07-23 7:20 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-23 6:17 [RESEND PATCH] dmaengine: dw-edma: Add Simple Mode Support Devendra K Verma
2025-06-26 22:06 ` Vinod Koul
2025-07-02 9:38 ` Verma, Devendra
2025-07-17 6:39 ` Verma, Devendra
2025-07-23 7:20 ` Vinod Koul [this message]
2025-07-24 9:45 ` Verma, Devendra
2025-07-23 13:56 ` Manivannan Sadhasivam
2025-07-31 9:32 ` Verma, Devendra
2025-07-31 13:31 ` Manivannan Sadhasivam
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