DMA Engine development
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From: Vinod Koul <vkoul@kernel.org>
To: Yi Sun <yi.sun@intel.com>
Cc: vinicius.gomes@intel.com, dave.jiang@intel.com,
	dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
	gordon.jin@intel.com, fenghuay@nvidia.com, yi1.lai@intel.com,
	Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
Subject: Re: [PATCH v3 1/2] dmaengine: idxd: Expose DSA3.0 capabilities through sysfs
Date: Tue, 2 Sep 2025 12:55:27 +0530	[thread overview]
Message-ID: <aLab55JCvLcbOm0S@vaman> (raw)
In-Reply-To: <20250821085111.1430076-2-yi.sun@intel.com>

On 21-08-25, 16:51, Yi Sun wrote:
> Introduce sysfs interfaces for 3 new Data Streaming Accelerator (DSA)
> capability registers (dsacap0-2) to enable userspace awareness of hardware
> features in DSA version 3 and later devices.
> 
> Userspace components (e.g. configure libraries, workload Apps) require this
> information to:
> 1. Select optimal data transfer strategies based on SGL capabilities
> 2. Enable hardware-specific optimizations for floating-point operations
> 3. Configure memory operations with proper numerical handling
> 4. Verify compute operation compatibility before submitting jobs
> 
> The output format is <dsacap2>,<dsacap1>,<dsacap0>, where each DSA
> capability value is a 64-bit hexadecimal number, separated by commas.
> The ordering follows the DSA 3.0 specification layout:
>  Offset:    0x190    0x188    0x180
>  Reg:       dsacap2  dsacap1  dsacap0
> 
> Example:
> cat /sys/bus/dsa/devices/dsa0/dsacaps
>  000000000000f18d,0014000e000007aa,00fa01ff01ff03ff

sysfs are supposed to be single values only, should we rather do per
capability? Also in future if you have more than three...? what happens
then?

-- 
~Vinod

  reply	other threads:[~2025-09-02  7:25 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-21  8:51 [PATCH v3 0/2] dmaengine: idxd: Add basic DSA 3.0 capability and SGL support Yi Sun
2025-08-21  8:51 ` [PATCH v3 1/2] dmaengine: idxd: Expose DSA3.0 capabilities through sysfs Yi Sun
2025-09-02  7:25   ` Vinod Koul [this message]
2025-09-02  8:34     ` Sun, Yi
2025-09-13  8:50       ` Sun, Yi
2025-08-21  8:51 ` [PATCH v3 2/2] dmaengine: idxd: Add Max SGL Size Support for DSA3.0 Yi Sun

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