From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D37EBE49; Thu, 5 Dec 2024 15:15:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733411735; cv=none; b=Ldu1MHpdQec3va0IOyDRtanIHTdMCTOgTD1LDb7Kafw6gJRV7t9ca1rNquWKm/WnyewwnThsbKU/q+mbV9X9cSIMQ4alTjy2mFadOgqglY8O4dc0zsQHJJVb7NK6rDdCLFrXn22mUXQDFhmj+2MVsyktTyHFL0KGGLbzhakhWXw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733411735; c=relaxed/simple; bh=4jA9YpjHgfQvrKB6Vqn7QorM5f0B56a1tvvFaqzk9jA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=OX7qo/MIoHVOkpLDOrStqb3OaXUlfhSoi0rEIOcL9uyKlMgrumDvSIy7K+UB6jMd9KJbRmMdLrucaW7hzQ0A0Z2qkU4iGOPK+omvBs0V5MDFhFfja2RxLo94M4GOjiBvO+RYMtaYYAYJhWLpelspFlN6hSwuTsRRP56wNwsSd3U= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=I3dC++Sd; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="I3dC++Sd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 542B3C4CED1; Thu, 5 Dec 2024 15:15:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1733411734; bh=4jA9YpjHgfQvrKB6Vqn7QorM5f0B56a1tvvFaqzk9jA=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=I3dC++Sd7ENPX7l4pixbN3rbjREGfnVXgLaKyeCFI7lUk7gEzV5I7n5MXb+nxBKl7 O85l+JGlwR2c4k+5So/Ub5UjJ24cp7+Vf8S8PjuwNkIqZq4xht4bpDaHBI9YbDd5SP RG1IkBmPRsGkYZhXlmcT/HOweGxFRHu4FSmAwCy3y0jwaFFWoXofElNs5E17c3tx6T 7TTqR07a13fqUZSSehQ/4B+XTU6R1LK31hS1aLz3j7MFhTHr04EDPWilTOCiYiaAYN IFgHn8e1BaXUJQMU3tSSoxhRya41Luzvdzh1HDOcI1OraNtKpVkIeXqS9GBshULQ9z NeEE8LZzyv41A== Message-ID: Date: Thu, 5 Dec 2024 16:15:27 +0100 Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: dma: Support channel page to nvidia,tegra210-adma To: Mohan Kumar D , vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: thierry.reding@gmail.com, jonathanh@nvidia.com, spujar@nvidia.com, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org References: <20241205145859.2331691-1-mkumard@nvidia.com> <20241205145859.2331691-2-mkumard@nvidia.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 05/12/2024 15:58, Mohan Kumar D wrote: > Multiple ADMA Channel page hardware support has been added from > TEGRA186 and onwards. Update the DT binding to use any of the > ADMA channel page address space region. > > Signed-off-by: Mohan Kumar D > --- > .../bindings/dma/nvidia,tegra210-adma.yaml | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml > index 877147e95ecc..8c76c98560c5 100644 > --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml > +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml > @@ -29,7 +29,24 @@ properties: > - const: nvidia,tegra186-adma > > reg: > - maxItems: 1 > + description: | Do not need '|' unless you need to preserve formatting. > + The 'page' region describes the address space of the page > + used for accessing the DMA channel registers. The 'global' > + region describes the address space of the global DMA registers. > + In the absence of the 'reg-names' property, there must be a > + single entry that covers the address space of the global DMA > + registers and the DMA channel registers. Rather oneOf listing the items with description. > + minItems: 1 > + maxItems: 2 > + > + reg-names: > + oneOf: > + - enum: > + - page > + - global This is not correct. You said it covers both. You also need allOf:if:then: block restricting it per each variant/device. Best regards, Krzysztof