From: Frank Li <Frank.li@nxp.com>
To: Nathan Lynch <nathan.lynch@amd.com>
Cc: Vinod Koul <vkoul@kernel.org>, Wei Huang <wei.huang2@amd.com>,
Mario Limonciello <mario.limonciello@amd.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Stephen Bates <Stephen.Bates@amd.com>,
PradeepVineshReddy.Kodamati@amd.com, John.Kariuki@amd.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
dmaengine@vger.kernel.org
Subject: Re: [PATCH 20/23] dmaengine: sdxi: Encode nop, copy, and interrupt descriptors
Date: Mon, 20 Apr 2026 04:52:00 -0400 [thread overview]
Message-ID: <aeXpMDSdukX4pE85@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20260410-sdxi-base-v1-20-1d184cb5c60a@amd.com>
On Fri, Apr 10, 2026 at 08:07:30AM -0500, Nathan Lynch wrote:
> Introduce low-level support for serializing three operation types to
> the descriptor ring of a client context: nop, copy, and interrupt.
> As with the administrative descriptor support introduced earlier, each
> operation has its own distinct type that overlays the generic struct
> sdxi_desc, along with a dedicated encoder function that accepts an
> operation-specific parameter struct.
>
> Copy descriptors are used to implement memcpy offload for the DMA
> engine provider, and interrupt descriptors are used to signal the
> completion of preceding descriptors in the ring. Nops can be used in
> error paths where a ring reservation has been obtained and the caller
> needs to submit valid descriptors before returning.
>
> Conditionally expose sdxi_encode_size32() for unit testing.
>
> Co-developed-by: Wei Huang <wei.huang2@amd.com>
> Signed-off-by: Wei Huang <wei.huang2@amd.com>
> Signed-off-by: Nathan Lynch <nathan.lynch@amd.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> drivers/dma/sdxi/descriptor.c | 107 ++++++++++++++++++++++++++++++++++++++++++
> drivers/dma/sdxi/descriptor.h | 25 ++++++++++
> drivers/dma/sdxi/hw.h | 33 +++++++++++++
> 3 files changed, 165 insertions(+)
>
> diff --git a/drivers/dma/sdxi/descriptor.c b/drivers/dma/sdxi/descriptor.c
> index be2a9244ce19..41019e747528 100644
> --- a/drivers/dma/sdxi/descriptor.c
> +++ b/drivers/dma/sdxi/descriptor.c
> @@ -7,12 +7,119 @@
>
> #include <kunit/visibility.h>
> #include <linux/bitfield.h>
> +#include <linux/bug.h>
> +#include <linux/range.h>
> +#include <linux/sizes.h>
> #include <linux/types.h>
> #include <asm/byteorder.h>
>
> #include "hw.h"
> #include "descriptor.h"
>
> +VISIBLE_IF_KUNIT int __must_check sdxi_encode_size32(u64 size, __le32 *dest)
> +{
> + /*
> + * sizes are encoded as value - 1:
> + * value encoding
> + * 1 0
> + * 2 1
> + * ...
> + * 4G 0xffffffff
> + */
> + if (WARN_ON_ONCE(size > SZ_4G) ||
> + WARN_ON_ONCE(size == 0))
> + return -EINVAL;
> + size = clamp_val(size, 1, SZ_4G);
> + *dest = cpu_to_le32((u32)(size - 1));
> + return 0;
> +}
> +EXPORT_SYMBOL_IF_KUNIT(sdxi_encode_size32);
> +
> +void sdxi_serialize_nop(struct sdxi_desc *desc)
> +{
> + u32 opcode = (FIELD_PREP(SDXI_DSC_SUBTYPE, SDXI_DSC_OP_SUBTYPE_NOP) |
> + FIELD_PREP(SDXI_DSC_TYPE, SDXI_DSC_OP_TYPE_DMAB));
> + u64 csb_ptr = FIELD_PREP(SDXI_DSC_NP, 1);
> +
> + *desc = (typeof(*desc)) {
> + .nop = (typeof(desc->nop)) {
> + .opcode = cpu_to_le32(opcode),
> + .csb_ptr = cpu_to_le64(csb_ptr),
> + },
> + };
> +
> +}
> +
> +int sdxi_encode_copy(struct sdxi_desc *desc, const struct sdxi_copy *params)
> +{
> + u64 csb_ptr;
> + u32 opcode;
> + __le32 size;
> + int err;
> +
> + err = sdxi_encode_size32(params->len, &size);
> + if (err)
> + return err;
> + /*
> + * Reject overlapping src and dst. "Software ... shall not
> + * overlap the source buffer, destination buffer, Atomic
> + * Return Data, or completion status block." - SDXI 1.0 5.6
> + * Memory Consistency Model
> + */
> + if (range_overlaps(&(const struct range) {
> + .start = params->src,
> + .end = params->src + params->len - 1,
> + },
> + &(const struct range) {
> + .start = params->dst,
> + .end = params->dst + params->len - 1,
> + }))
> + return -EINVAL;
> +
> + opcode = (FIELD_PREP(SDXI_DSC_SUBTYPE, SDXI_DSC_OP_SUBTYPE_COPY) |
> + FIELD_PREP(SDXI_DSC_TYPE, SDXI_DSC_OP_TYPE_DMAB));
> +
> + csb_ptr = FIELD_PREP(SDXI_DSC_NP, 1);
> +
> + *desc = (typeof(*desc)) {
> + .copy = (typeof(desc->copy)) {
> + .opcode = cpu_to_le32(opcode),
> + .size = size,
> + .akey0 = cpu_to_le16(params->src_akey),
> + .akey1 = cpu_to_le16(params->dst_akey),
> + .addr0 = cpu_to_le64(params->src),
> + .addr1 = cpu_to_le64(params->dst),
> + .csb_ptr = cpu_to_le64(csb_ptr),
> + },
> + };
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_IF_KUNIT(sdxi_encode_copy);
> +
> +int sdxi_encode_intr(struct sdxi_desc *desc,
> + const struct sdxi_intr *params)
> +{
> + u64 csb_ptr;
> + u32 opcode;
> +
> + opcode = (FIELD_PREP(SDXI_DSC_SUBTYPE, SDXI_DSC_OP_SUBTYPE_INTR) |
> + FIELD_PREP(SDXI_DSC_TYPE, SDXI_DSC_OP_TYPE_INTR));
> +
> + csb_ptr = FIELD_PREP(SDXI_DSC_NP, 1);
> +
> + *desc = (typeof(*desc)) {
> + .intr = (typeof(desc->intr)) {
> + .opcode = cpu_to_le32(opcode),
> + .akey = cpu_to_le16(params->akey),
> + .csb_ptr = cpu_to_le64(csb_ptr),
> + },
> + };
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_IF_KUNIT(sdxi_encode_intr);
> +
> int sdxi_encode_cxt_start(struct sdxi_desc *desc,
> const struct sdxi_cxt_start *params)
> {
> diff --git a/drivers/dma/sdxi/descriptor.h b/drivers/dma/sdxi/descriptor.h
> index 5b8fd7cbaa03..14f92c8dea1d 100644
> --- a/drivers/dma/sdxi/descriptor.h
> +++ b/drivers/dma/sdxi/descriptor.h
> @@ -9,6 +9,7 @@
> */
>
> #include <linux/bitfield.h>
> +#include <linux/kconfig.h>
> #include <linux/minmax.h>
> #include <linux/ratelimit.h>
> #include <linux/types.h>
> @@ -16,6 +17,10 @@
>
> #include "hw.h"
>
> +#if IS_ENABLED(CONFIG_KUNIT)
> +int __must_check sdxi_encode_size32(u64 size, __le32 *dest);
> +#endif
> +
> static inline void sdxi_desc_vl_expect(const struct sdxi_desc *desc, bool expected)
> {
> u8 vl = FIELD_GET(SDXI_DSC_VL, le32_to_cpu(desc->opcode));
> @@ -80,6 +85,26 @@ static inline struct sdxi_cxt_range sdxi_cxt_range_single(u16 nr)
> return sdxi_cxt_range(nr, nr);
> }
>
> +void sdxi_serialize_nop(struct sdxi_desc *desc);
> +
> +struct sdxi_copy {
> + dma_addr_t src;
> + dma_addr_t dst;
> + u64 len;
> + u16 src_akey;
> + u16 dst_akey;
> +};
> +
> +int sdxi_encode_copy(struct sdxi_desc *desc,
> + const struct sdxi_copy *params);
> +
> +struct sdxi_intr {
> + u16 akey;
> +};
> +
> +int sdxi_encode_intr(struct sdxi_desc *desc,
> + const struct sdxi_intr *params);
> +
> struct sdxi_cxt_start {
> struct sdxi_cxt_range range;
> };
> diff --git a/drivers/dma/sdxi/hw.h b/drivers/dma/sdxi/hw.h
> index 4dcd0a3ff0fd..11d88cfc8819 100644
> --- a/drivers/dma/sdxi/hw.h
> +++ b/drivers/dma/sdxi/hw.h
> @@ -164,6 +164,30 @@ struct sdxi_desc {
> static_assert(offsetof(struct tag_, csb_ptr) == \
> offsetof(struct sdxi_dsc_generic, csb_ptr))
>
> + /* SDXI 1.0 Table 6-6: DSC_DMAB_NOP Descriptor Format */
> + define_sdxi_dsc(sdxi_dsc_dmab_nop, nop,
> + __u8 rsvd_0[52];
> + );
> +
> + /* SDXI 1.0 Table 6-8: DSC_DMAB_COPY Descriptor Format */
> + define_sdxi_dsc(sdxi_dsc_dmab_copy, copy,
> + __le32 size;
> + __u8 attr;
> + __u8 rsvd_0[3];
> + __le16 akey0;
> + __le16 akey1;
> + __le64 addr0;
> + __le64 addr1;
> + __u8 rsvd_1[24];
> + );
> +
> + /* SDXI 1.0 Table 6-12: DSC_INTR Descriptor Format */
> + define_sdxi_dsc(sdxi_dsc_intr, intr,
> + __u8 rsvd_0[8];
> + __le16 akey;
> + __u8 rsvd_1[42];
> + );
> +
> /* SDXI 1.0 Table 6-14: DSC_CXT_START Descriptor Format */
> define_sdxi_dsc(sdxi_dsc_cxt_start, cxt_start,
> __u8 rsvd_0;
> @@ -207,11 +231,20 @@ static_assert(sizeof(struct sdxi_desc) == 64);
>
> /* SDXI 1.0 Table 6-1: SDXI Operation Groups */
> enum sdxi_dsc_type {
> + SDXI_DSC_OP_TYPE_DMAB = 0x001,
> SDXI_DSC_OP_TYPE_ADMIN = 0x002,
> + SDXI_DSC_OP_TYPE_INTR = 0x004,
> };
>
> /* SDXI 1.0 Table 6-2: SDXI Operation Groups, Types, and Subtypes */
> enum sdxi_dsc_subtype {
> + /* DMA Base */
> + SDXI_DSC_OP_SUBTYPE_NOP = 0x01,
> + SDXI_DSC_OP_SUBTYPE_COPY = 0x03,
> +
> + /* Interrupt */
> + SDXI_DSC_OP_SUBTYPE_INTR = 0x00,
> +
> /* Administrative */
> SDXI_DSC_OP_SUBTYPE_CXT_START_NM = 0x03,
> SDXI_DSC_OP_SUBTYPE_CXT_STOP = 0x04,
>
> --
> 2.53.0
>
next prev parent reply other threads:[~2026-04-20 8:52 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-10 13:07 [PATCH 00/23] dmaengine: Smart Data Accelerator Interface (SDXI) basic support Nathan Lynch via B4 Relay
2026-04-10 13:07 ` [PATCH 01/23] PCI: Add SNIA SDXI accelerator sub-class Nathan Lynch via B4 Relay
2026-04-10 13:07 ` [PATCH 02/23] MAINTAINERS: Add entry for SDXI driver Nathan Lynch via B4 Relay
2026-04-10 13:07 ` [PATCH 03/23] dmaengine: sdxi: Add PCI initialization Nathan Lynch via B4 Relay
2026-04-20 6:36 ` Frank Li
2026-04-20 15:29 ` Lynch, Nathan
2026-04-10 13:07 ` [PATCH 04/23] dmaengine: sdxi: Feature discovery and initial configuration Nathan Lynch via B4 Relay
2026-04-20 6:51 ` Frank Li
2026-04-20 19:31 ` Lynch, Nathan
2026-04-10 13:07 ` [PATCH 05/23] dmaengine: sdxi: Configure context tables Nathan Lynch via B4 Relay
2026-04-10 13:07 ` [PATCH 06/23] dmaengine: sdxi: Allocate DMA pools Nathan Lynch via B4 Relay
2026-04-20 7:03 ` Frank Li
2026-04-20 22:16 ` Lynch, Nathan
2026-04-10 13:07 ` [PATCH 07/23] dmaengine: sdxi: Allocate administrative context Nathan Lynch via B4 Relay
2026-04-20 7:11 ` Frank Li
2026-04-10 13:07 ` [PATCH 08/23] dmaengine: sdxi: Install " Nathan Lynch via B4 Relay
2026-04-20 7:16 ` Frank Li
2026-04-10 13:07 ` [PATCH 09/23] dmaengine: sdxi: Start functions on probe, stop on remove Nathan Lynch via B4 Relay
2026-04-20 7:18 ` Frank Li
2026-04-10 13:07 ` [PATCH 10/23] dmaengine: sdxi: Complete administrative context jump start Nathan Lynch via B4 Relay
2026-04-20 7:33 ` Frank Li
2026-04-10 13:07 ` [PATCH 11/23] dmaengine: sdxi: Add client context alloc and release APIs Nathan Lynch via B4 Relay
2026-04-20 8:19 ` Frank Li
2026-04-10 13:07 ` [PATCH 12/23] dmaengine: sdxi: Add descriptor ring management Nathan Lynch via B4 Relay
2026-04-20 8:32 ` Frank Li
2026-04-20 22:42 ` Lynch, Nathan
2026-04-10 13:07 ` [PATCH 13/23] dmaengine: sdxi: Add unit tests for descriptor ring reservations Nathan Lynch via B4 Relay
2026-04-10 13:07 ` [PATCH 14/23] dmaengine: sdxi: Attach descriptor ring state to contexts Nathan Lynch via B4 Relay
2026-04-20 8:34 ` Frank Li
2026-04-10 13:07 ` [PATCH 15/23] dmaengine: sdxi: Per-context access key (AKey) table entry allocator Nathan Lynch via B4 Relay
2026-04-20 8:39 ` Frank Li
2026-04-10 13:07 ` [PATCH 16/23] dmaengine: sdxi: Generic descriptor manipulation helpers Nathan Lynch via B4 Relay
2026-04-20 8:40 ` Frank Li
2026-04-10 13:07 ` [PATCH 17/23] dmaengine: sdxi: Add completion status block API Nathan Lynch via B4 Relay
2026-04-20 8:44 ` Frank Li
2026-04-10 13:07 ` [PATCH 18/23] dmaengine: sdxi: Encode context start, stop, and sync descriptors Nathan Lynch via B4 Relay
2026-04-20 8:48 ` Frank Li
2026-04-10 13:07 ` [PATCH 19/23] dmaengine: sdxi: Provide context start and stop APIs Nathan Lynch via B4 Relay
2026-04-20 8:50 ` Frank Li
2026-04-21 19:54 ` Lynch, Nathan
2026-04-10 13:07 ` [PATCH 20/23] dmaengine: sdxi: Encode nop, copy, and interrupt descriptors Nathan Lynch via B4 Relay
2026-04-20 8:52 ` Frank Li [this message]
2026-04-10 13:07 ` [PATCH 21/23] dmaengine: sdxi: Add unit tests for descriptor encoding Nathan Lynch via B4 Relay
2026-04-10 13:07 ` [PATCH 22/23] dmaengine: sdxi: MSI/MSI-X vector allocation and mapping Nathan Lynch via B4 Relay
2026-04-20 8:54 ` Frank Li
2026-04-10 13:07 ` [PATCH 23/23] dmaengine: sdxi: Add DMA engine provider Nathan Lynch via B4 Relay
2026-04-20 9:08 ` Frank Li
2026-04-21 20:04 ` Lynch, Nathan
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