From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BBDD037DE85; Mon, 4 May 2026 10:29:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777890564; cv=none; b=S3F7vmubpWnu4bILlhbjYNkrSyuXdhTMm+jqHurGGmb5mWR0YneI7EatSpId93uXG8AQUOARTuIjMIxE42sE89FPnv2Qsas+UUKoUBypwGoNbAyfE6GAbU9OBiHbnxu2zgEOrzA+EtnB788r7JHbvfbO/SJ8QOUDIXVlXjcHluY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777890564; c=relaxed/simple; bh=FyCNOB4LnMDVr/jbM0/bt6a3v8X8DcEELn5/KOm+G9Q=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=HaMvxHCCGqkd1p99EwnHmdpoXgstTUaFHyHjbTYKZWZ6PjtfCynAoAgQUppLCxc/LMvUkc8dY+D0uR4E4yrJcIXfplbcRnXSy2yvqrtEP0Tq4aAfb3hxMSIUwWERfdO6MDoEY6WVJ3L+rlSaJbuq0/Iupuyo0mUMaTzwDMwkeK0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Rs8u1udZ; arc=none smtp.client-ip=198.175.65.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Rs8u1udZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1777890563; x=1809426563; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=FyCNOB4LnMDVr/jbM0/bt6a3v8X8DcEELn5/KOm+G9Q=; b=Rs8u1udZEpi8VWRsvvMv5dI7an/9WFcvCxNzKmOYj6/D+jgSuNZfDwrB H13rm95Zgmc2M7XB5fD4fNKxFb06UuHRI1j/QGPR8Jg9LPClH4VquwVqJ ojRtfFKzj2mI+ogIMqLfLuWjv+T9W69d2DeCJGWY7u1Ms577HcuyxHO6r 42vUwPZgMtOZytxFtL+bBngEW3G5CSI2NXo8o9jI09jLmBUmk98CStBfO +8bCO+TufczlyOTx4yRypqjrayjFZhJU9/DhYTDR/oG/toarNMUzJd6QG rEzcH7xxOCnsMcqb3mZUHN54niSS7Vb6RLnqr+zSElhcETlr+SUggJigl A==; X-CSE-ConnectionGUID: JCF9NoHHSimaJ0bzigjUkQ== X-CSE-MsgGUID: vyW1sM5aStajtx0hZBvQTA== X-IronPort-AV: E=McAfee;i="6800,10657,11775"; a="78677563" X-IronPort-AV: E=Sophos;i="6.23,215,1770624000"; d="scan'208";a="78677563" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 May 2026 03:29:17 -0700 X-CSE-ConnectionGUID: 8uN7JzyVTf2HirA3oI9WFg== X-CSE-MsgGUID: 5MOCY1OUQhWOwitm8UzbMQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,215,1770624000"; d="scan'208";a="237254616" Received: from hrotuna-mobl2.ger.corp.intel.com (HELO localhost) ([10.245.245.78]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 May 2026 03:29:15 -0700 Date: Mon, 4 May 2026 13:29:12 +0300 From: Andy Shevchenko To: Uwe =?iso-8859-1?Q?Kleine-K=F6nig_=28The_Capable_Hub=29?= Cc: Vinod Koul , Markus Schneider-Pargmann , Basavaraj Natikar , Frank Li , Manivannan Sadhasivam , Viresh Kumar , dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] dmaengine: Consistently define pci_device_ids using named initializers Message-ID: References: <20260504102008.1996139-2-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260504102008.1996139-2-u.kleine-koenig@baylibre.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Mon, May 04, 2026 at 12:20:06PM +0200, Uwe Kleine-König (The Capable Hub) wrote: > The .driver_data member of the various struct pci_device_id arrays were > initialized by list expressions. This isn't easily readable if you're > not into PCI. Using named initializers is more explicit and thus easier > to parse. Also skip explicit assignments of 0 (which the compiler then > takes care of). > > This change doesn't introduce changes to the compiled pci_device_id > arrays. Tested on x86 and arm64. HSU driver has different change ("Also" is a strong sign to the split required). ... > static const struct pci_device_id pch_dma_id_table[] = { > - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_EG20T_PCH_DMA_8CH), 8 }, > - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_EG20T_PCH_DMA_4CH), 4 }, > - { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA1_8CH), 8}, /* UART Video */ > - { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA2_8CH), 8}, /* PCMIF SPI */ > - { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA3_4CH), 4}, /* FPGA */ > - { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA4_12CH), 12}, /* I2S */ > - { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_DMA1_4CH), 4}, /* UART */ > - { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_DMA2_4CH), 4}, /* Video SPI */ > - { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_DMA3_4CH), 4}, /* Security */ > - { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_DMA4_4CH), 4}, /* FPGA */ > - { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7831_DMA1_8CH), 8}, /* UART */ > - { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7831_DMA2_4CH), 4}, /* SPI */ > - { 0, }, > + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_EG20T_PCH_DMA_8CH), .driver_data = 8 }, > + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_EG20T_PCH_DMA_4CH), .driver_data = 4 }, > + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA1_8CH), .driver_data = 8 }, /* UART Video */ > + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA2_8CH), .driver_data = 8 }, /* PCMIF SPI */ > + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA3_4CH), .driver_data = 4 }, /* FPGA */ > + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA4_12CH), .driver_data = 12 }, /* I2S */ > + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_DMA1_4CH), .driver_data = 4 }, /* UART */ > + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_DMA2_4CH), .driver_data = 4 }, /* Video SPI */ > + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_DMA3_4CH), .driver_data = 4 }, /* Security */ > + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_DMA4_4CH), .driver_data = 4 }, /* FPGA */ > + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7831_DMA1_8CH), .driver_data = 8 }, /* UART */ > + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7831_DMA2_4CH), .driver_data = 4 }, /* SPI */ > + { }, > }; Use PCI_DEVICE_DATA() instead. Same may apply to DesignWare, but one needs to define the device IDs. I think I may help with that. -- With Best Regards, Andy Shevchenko