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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?iso-8859-1?Q?FwgyhtNajPsGjzW4FzLZxHEFgpbo1shAlrfP9idKHjNOd6g9pXYHWFS67d?= =?iso-8859-1?Q?qbNTYgrjm+G0vWMbyQi0o+88PHG+rzmMxrJbrmch35eChTiLuT3w6BNUwC?= =?iso-8859-1?Q?4yiQ1LaZvJf6jodSTOMsGT53b6B+IX7jwhkUwLab/paqBOccFXjhYWGBlX?= =?iso-8859-1?Q?PhFagUpH77PsOW6lfeDmqsx7jk4+UinLrdY8Q3nR0ZRTFRWn6sPS3FRQSa?= =?iso-8859-1?Q?eNR99fdaN5ovCS0hfODa6w07wckIkD2rmb01SMW7gLKsoPPJ3RO0YJaQzC?= =?iso-8859-1?Q?09SWun+HZ1I+Yp23to7100fmi/9Gw6K6hZLE99xmbkwDHMq9vk3GI90RCl?= =?iso-8859-1?Q?tD1Gm4ANEANt62fSCoh4Anr17aob/g+/7ppq4Q7Gm9zmKJ7OVZcG/SNPAG?= =?iso-8859-1?Q?4icikDPf9xqDHg9bct5Oa2RJX0lkJKMj4tqBx0AFL+NnVQrl16Wm3ylqaV?= =?iso-8859-1?Q?LfRlZIxxpHJBaOT3NLWA7cGoSqd0Ihb9WqoMTGb9+GPYBLDGbDsW20wuL1?= =?iso-8859-1?Q?05YCvL6TkE6aeehtJbnTr+6znhHNz2shFreQSHxH38ctJJ+r8fp0GEyg1y?= =?iso-8859-1?Q?o31O6GsFQHljJoGvjTxQmQeJsMEKpMhcOJkqSFNm4QsMpySzCkSUPb9n0d?= =?iso-8859-1?Q?2QjY296ixVv6HCUrby18PUAxbeWpVfJA96CdnBSiqipyqkKAHzAHgx82Q/?= =?iso-8859-1?Q?1Ufm2HvqMlGXiP4aEEs2w3Lex9NLceJJW3WtaQx4EJHDikw/YrSN6MCBo9?= =?iso-8859-1?Q?Dlj/B/reKFXg9NlyykIVUr9Y2TVvVwYQ04U1m4+IZBBSsIW9Dm0LMQgYjx?= =?iso-8859-1?Q?aNy0KziATEvyGhhXMRkizIxHwISAb5bDWUNHmR4cmL9bTL2mS7S7Z9Iz8g?= =?iso-8859-1?Q?ovar4GzsCz+NbImwB7CtAJg3UG1oOO3D6Qo7Ksuyf91VUfcFYjd9ZIcmme?= =?iso-8859-1?Q?k8Ac1e6nMvl0cJoedgqj4XsaJBajLjxPSgMvsKZf5ws4CJmAL13yq39OA4?= =?iso-8859-1?Q?zdKFafOn2560F50NZAkGZLEnb28pMKBOhsGAbjaDSPbpJnYgPhJBs5PrSR?= =?iso-8859-1?Q?3lpqoGMBWYwCGhKA3sJ2DYdNrUrxNJzEOUKgvFJ7kbUchjlvQV81uir5yR?= =?iso-8859-1?Q?bAEuRabEeHHFHZUJcuQ17yd39ddHZ9Qv8rQrwDklwa9FqF5XowRkf0t+9e?= =?iso-8859-1?Q?ao0Pi9ez1Wd01gl9Iy+fdGHpaRMxQBpGZTXoJUUZkNuQKqTIPnhkYdOyGL?= =?iso-8859-1?Q?ebLoZ6W4r2/BELaSnzNqtij9qX4RnOzss3TTEo2RrnIASkJbOGu6OWg3uN?= =?iso-8859-1?Q?cHBu/EEJTKN7bKCjPtuWn1n99vLluNYjA6xCz2Mh5cxIoQtR9sxh7XqKMH?= =?iso-8859-1?Q?b+5tytiBfp33S39A9VzeSkIk3U65hFlEIOqwi6kWXHvXo8QAFSf1/Qh+Bk?= =?iso-8859-1?Q?hPs9yg52BziauRyl51XSNABLcQ7zx1t9t1vvgaAmArRVcA2pk3iyWTPiCg?= =?iso-8859-1?Q?6FATHh6mugdDC7xAduj27KRkiXW8F/3v4H9skGwYbi4BT+kQdRp3Dawv5y?= =?iso-8859-1?Q?9ga3TncCiDJnZrCltFeDwBWjxinhaSkLe8Zd6o1ACII90cIOOSqMAkuK72?= =?iso-8859-1?Q?B0G9mk3dUklKLDCBrzQ4D9ZSx1kDCIwB/tvAPBTUosS3dHZswxEAUP5pEU?= =?iso-8859-1?Q?a3rbXeOp1V8f16s/elNcgv2vs8NNL4ekEfujXqYa6e81gmirTcperRmCdc?= =?iso-8859-1?Q?0mNSSKpp+LLwh4Rv4hpGXJwMgZ3sk6A9XJflgcBux4Bg9K?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 561db272-731e-47e3-0d60-08deaf91716f X-MS-Exchange-CrossTenant-AuthSource: PA4PR04MB9366.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 19:13:54.3482 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: S+1g43wrZzZhLvXbglM/MzBrBSv51KEuB+gQBSf/ca1Mfueu7zrug5SBVcUkhr0t1fe1pcUWsY721nGL5/KIkg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4PR04MB9552 On Mon, May 11, 2026 at 03:57:19PM +0200, Benoît Monin wrote: > Add implementation of .device_prep_peripheral_dma_vec() callback to setup > a scatter/gather DMA transfer from an array of dma_vec structures. Setup > a cyclic transfer if the DMA_PREP_REPEAT flag is set. > > Signed-off-by: Benoît Monin > --- Reviewed-by: Frank Li > drivers/dma/fsl-edma-common.c | 109 ++++++++++++++++++++++++++++++++++++++++++ > drivers/dma/fsl-edma-common.h | 4 ++ > drivers/dma/fsl-edma-main.c | 2 + > 3 files changed, 115 insertions(+) > > diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c > index bb7531c456df..c10190164926 100644 > --- a/drivers/dma/fsl-edma-common.c > +++ b/drivers/dma/fsl-edma-common.c > @@ -673,6 +673,115 @@ struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic( > return vchan_tx_prep(&fsl_chan->vchan, &fsl_desc->vdesc, flags); > } > > +struct dma_async_tx_descriptor * > +fsl_edma_prep_peripheral_dma_vec(struct dma_chan *chan, const struct dma_vec *vecs, > + size_t nb, enum dma_transfer_direction direction, > + unsigned long flags) > +{ > + struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan); > + dma_addr_t src_addr, dst_addr, last_sg; > + struct fsl_edma_desc *fsl_desc; > + u16 soff, doff, iter; > + u32 nbytes; > + int i; > + > + if (!is_slave_direction(direction)) > + return NULL; > + > + if (!fsl_edma_prep_slave_dma(fsl_chan, direction)) > + return NULL; > + > + fsl_desc = fsl_edma_alloc_desc(fsl_chan, nb); > + if (!fsl_desc) > + return NULL; > + fsl_desc->iscyclic = flags & DMA_PREP_REPEAT; > + fsl_desc->dirn = direction; > + > + if (direction == DMA_MEM_TO_DEV) { > + if (!fsl_chan->cfg.src_addr_width) > + fsl_chan->cfg.src_addr_width = fsl_chan->cfg.dst_addr_width; > + fsl_chan->attr = > + fsl_edma_get_tcd_attr(fsl_chan->cfg.src_addr_width, > + fsl_chan->cfg.dst_addr_width); > + nbytes = fsl_chan->cfg.dst_addr_width * fsl_chan->cfg.dst_maxburst; > + } else { > + if (!fsl_chan->cfg.dst_addr_width) > + fsl_chan->cfg.dst_addr_width = fsl_chan->cfg.src_addr_width; > + fsl_chan->attr = > + fsl_edma_get_tcd_attr(fsl_chan->cfg.src_addr_width, > + fsl_chan->cfg.dst_addr_width); > + nbytes = fsl_chan->cfg.src_addr_width * fsl_chan->cfg.src_maxburst; > + } > + > + for (i = 0; i < nb; i++) { > + if (direction == DMA_MEM_TO_DEV) { > + src_addr = vecs[i].addr; > + dst_addr = fsl_chan->dma_dev_addr; > + soff = fsl_chan->cfg.dst_addr_width; > + doff = 0; > + } else if (direction == DMA_DEV_TO_MEM) { > + src_addr = fsl_chan->dma_dev_addr; > + dst_addr = vecs[i].addr; > + soff = 0; > + doff = fsl_chan->cfg.src_addr_width; > + } else { > + /* DMA_DEV_TO_DEV */ > + src_addr = fsl_chan->cfg.src_addr; > + dst_addr = fsl_chan->cfg.dst_addr; > + soff = 0; > + doff = 0; > + } > + > + /* > + * Choose the suitable burst length if dma_vec length is not > + * multiple of burst length so that the whole transfer length is > + * multiple of minor loop(burst length). > + */ > + if (vecs[i].len % nbytes) { > + u32 width = (direction == DMA_DEV_TO_MEM) ? doff : soff; > + u32 burst = (direction == DMA_DEV_TO_MEM) ? > + fsl_chan->cfg.src_maxburst : > + fsl_chan->cfg.dst_maxburst; > + int j; > + > + for (j = burst; j > 1; j--) { > + if (!(vecs[i].len % (j * width))) { > + nbytes = j * width; > + break; > + } > + } > + /* Set burst size as 1 if there's no suitable one */ > + if (j == 1) > + nbytes = width; > + } > + > + iter = vecs[i].len / nbytes; > + if (i < nb - 1) { > + last_sg = fsl_desc->tcd[(i + 1)].ptcd; > + fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr, > + dst_addr, fsl_chan->attr, soff, > + nbytes, 0, iter, iter, doff, last_sg, > + false, false, true); > + } else { > + if (fsl_desc->iscyclic) { > + last_sg = fsl_desc->tcd[0].ptcd; > + fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr, > + dst_addr, fsl_chan->attr, soff, > + nbytes, 0, iter, iter, doff, last_sg, > + true, false, true); > + } else { > + last_sg = 0; > + fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr, > + dst_addr, fsl_chan->attr, soff, > + nbytes, 0, iter, iter, doff, last_sg, > + true, true, false); > + } > + } > + } > + > + return vchan_tx_prep(&fsl_chan->vchan, &fsl_desc->vdesc, flags); > +} > + > struct dma_async_tx_descriptor *fsl_edma_prep_slave_sg( > struct dma_chan *chan, struct scatterlist *sgl, > unsigned int sg_len, enum dma_transfer_direction direction, > diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h > index 205a96489094..0d028048701d 100644 > --- a/drivers/dma/fsl-edma-common.h > +++ b/drivers/dma/fsl-edma-common.h > @@ -496,6 +496,10 @@ struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic( > struct dma_chan *chan, dma_addr_t dma_addr, size_t buf_len, > size_t period_len, enum dma_transfer_direction direction, > unsigned long flags); > +struct dma_async_tx_descriptor *fsl_edma_prep_peripheral_dma_vec( > + struct dma_chan *chan, const struct dma_vec *vecs, > + size_t nb, enum dma_transfer_direction direction, > + unsigned long flags); > struct dma_async_tx_descriptor *fsl_edma_prep_slave_sg( > struct dma_chan *chan, struct scatterlist *sgl, > unsigned int sg_len, enum dma_transfer_direction direction, > diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c > index 36155ab1602a..6693b4270a1a 100644 > --- a/drivers/dma/fsl-edma-main.c > +++ b/drivers/dma/fsl-edma-main.c > @@ -841,6 +841,8 @@ static int fsl_edma_probe(struct platform_device *pdev) > fsl_edma->dma_dev.device_free_chan_resources > = fsl_edma_free_chan_resources; > fsl_edma->dma_dev.device_tx_status = fsl_edma_tx_status; > + fsl_edma->dma_dev.device_prep_peripheral_dma_vec > + = fsl_edma_prep_peripheral_dma_vec; > fsl_edma->dma_dev.device_prep_slave_sg = fsl_edma_prep_slave_sg; > fsl_edma->dma_dev.device_prep_dma_cyclic = fsl_edma_prep_dma_cyclic; > fsl_edma->dma_dev.device_prep_dma_memcpy = fsl_edma_prep_memcpy; > > -- > 2.54.0 >