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This was error prone: axi_dma_resume() enabled cfgr_clk > and then core_clk, and if enabling core_clk failed it returned the > error without disabling cfgr_clk, leaving the clock refcount > unbalanced. > > Convert the driver to the clk_bulk API. The two clocks are always > acquired, enabled and disabled together, so a clk_bulk_data array > expresses this naturally and shrinks the get/enable/disable paths. > clk_bulk_prepare_enable() also unwinds any clock it already enabled > when a later one fails, which fixes the resume imbalance. > > Fixes: 1fe20f1b8454 ("dmaengine: Introduce DW AXI DMAC driver") > Signed-off-by: Chaithanya Lagisetty > --- Again, don't post new patch to old patch's thread. Reviewed-by: Frank Li > Changes since v1: > - Convert the driver to the clk_bulk API instead of manually disabling > cfgr_clk on the error path, as suggested by Frank Li. > - v1: https://lore.kernel.org/all/20260813105432.2577322-1-nagachaithanya9911@gmail.com/ > > .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 28 ++++++++----------- > drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 3 +- > 2 files changed, 13 insertions(+), 18 deletions(-) > > diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c > index bcefaff03b5c..254167a558ff 100644 > --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c > +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c > @@ -1320,8 +1320,7 @@ static int axi_dma_suspend(struct axi_dma_chip *chip) > axi_dma_irq_disable(chip); > axi_dma_disable(chip); > > - clk_disable_unprepare(chip->core_clk); > - clk_disable_unprepare(chip->cfgr_clk); > + clk_bulk_disable_unprepare(ARRAY_SIZE(chip->clks), chip->clks); > > return 0; > } > @@ -1330,11 +1329,7 @@ static int axi_dma_resume(struct axi_dma_chip *chip) > { > int ret; > > - ret = clk_prepare_enable(chip->cfgr_clk); > - if (ret < 0) > - return ret; > - > - ret = clk_prepare_enable(chip->core_clk); > + ret = clk_bulk_prepare_enable(ARRAY_SIZE(chip->clks), chip->clks); > if (ret < 0) > return ret; > > @@ -1524,13 +1519,11 @@ static int dw_probe(struct platform_device *pdev) > > chip->dw->hdata->use_cfg2 = !!(flags & AXI_DMA_FLAG_USE_CFG2); > > - chip->core_clk = devm_clk_get(chip->dev, "core-clk"); > - if (IS_ERR(chip->core_clk)) > - return PTR_ERR(chip->core_clk); > - > - chip->cfgr_clk = devm_clk_get(chip->dev, "cfgr-clk"); > - if (IS_ERR(chip->cfgr_clk)) > - return PTR_ERR(chip->cfgr_clk); > + chip->clks[0].id = "core-clk"; > + chip->clks[1].id = "cfgr-clk"; > + ret = devm_clk_bulk_get(chip->dev, ARRAY_SIZE(chip->clks), chip->clks); > + if (ret) > + return dev_err_probe(chip->dev, ret, "failed to get clocks\n"); > > ret = parse_device_properties(chip); > if (ret) > @@ -1640,10 +1633,13 @@ static void dw_remove(struct platform_device *pdev) > struct dw_axi_dma *dw = chip->dw; > struct axi_dma_chan *chan, *_chan; > u32 i; > + int ret; > > /* Enable clk before accessing to registers */ > - clk_prepare_enable(chip->cfgr_clk); > - clk_prepare_enable(chip->core_clk); > + ret = clk_bulk_prepare_enable(ARRAY_SIZE(chip->clks), chip->clks); > + if (ret) > + dev_warn(chip->dev, "failed to enable clocks before remove: %d\n", > + ret); > axi_dma_irq_disable(chip); > for (i = 0; i < dw->hdata->nr_channels; i++) { > axi_chan_disable(&chip->dw->chan[i]); > diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h > index 67cc199e24d1..039316c42f05 100644 > --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h > +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h > @@ -69,8 +69,7 @@ struct axi_dma_chip { > int irq[DMAC_MAX_CHANNELS]; > void __iomem *regs; > void __iomem *apb_regs; > - struct clk *core_clk; > - struct clk *cfgr_clk; > + struct clk_bulk_data clks[2]; > struct dw_axi_dma *dw; > }; > > -- > 2.43.0 >