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Thu, 24 Sep 2026 19:08:51 +0000 Date: Thu, 24 Sep 2026 15:08:44 -0400 From: Frank Li To: Rosen Penev Cc: dmaengine@vger.kernel.org Subject: Re: [PATCHv2] dmaengine: k3-udma: simplify resource allocation Message-ID: References: <20260630013917.1537819-1-rosenp@gmail.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260630013917.1537819-1-rosenp@gmail.com> X-ClientProxiedBy: CY5PR17CA0028.namprd17.prod.outlook.com (2603:10b6:930:17::27) To GV2PR04MB11799.eurprd04.prod.outlook.com (2603:10a6:150:2cf::9) Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR04MB11799:EE_|PR3PR04MB7417:EE_ X-MS-Office365-Filtering-Correlation-Id: c871d996-5f9f-414d-7f05-08df1a6f44c2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|23010399003|366016|1800799024|19092799006|10067099003|11063799006|56012099006|3023799007|18002099003|22082099003; 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> struct device *dev = ud->dev; > - struct ti_sci_resource *rm_res, irq_res; > + struct ti_sci_resource *rm_res, *irq_res; > struct udma_tisci_rm *tisci_rm = &ud->tisci_rm; > u32 cap3; > + u16 sets; > > /* Set up the throughput level start indexes */ > cap3 = udma_read(ud->mmrs[MMR_GCFG], 0x2c); > @@ -4664,64 +4665,67 @@ static int udma_setup_resources(struct udma_dev *ud) > rm_res = tisci_rm->rm_ranges[RM_RANGE_TCHAN]; > if (IS_ERR(rm_res)) { > bitmap_zero(ud->tchan_map, ud->tchan_cnt); > - irq_res.sets = 1; > + sets = 1; > } else { > bitmap_fill(ud->tchan_map, ud->tchan_cnt); > for (i = 0; i < rm_res->sets; i++) > udma_mark_resource_ranges(ud, ud->tchan_map, > &rm_res->desc[i], "tchan"); > - irq_res.sets = rm_res->sets; > + sets = rm_res->sets; > } > > /* rchan and matching default flow ranges */ > rm_res = tisci_rm->rm_ranges[RM_RANGE_RCHAN]; > if (IS_ERR(rm_res)) { > bitmap_zero(ud->rchan_map, ud->rchan_cnt); > - irq_res.sets++; > + sets++; > } else { > bitmap_fill(ud->rchan_map, ud->rchan_cnt); > for (i = 0; i < rm_res->sets; i++) > udma_mark_resource_ranges(ud, ud->rchan_map, > &rm_res->desc[i], "rchan"); > - irq_res.sets += rm_res->sets; > + sets += rm_res->sets; > } > > - irq_res.desc = kzalloc_objs(*irq_res.desc, irq_res.sets); > - if (!irq_res.desc) > + irq_res = kzalloc_flex(*irq_res, desc, sets); > + if (!irq_res) > return -ENOMEM; > + > + irq_res->sets = sets; > + > rm_res = tisci_rm->rm_ranges[RM_RANGE_TCHAN]; > if (IS_ERR(rm_res)) { > - irq_res.desc[0].start = 0; > - irq_res.desc[0].num = ud->tchan_cnt; > + irq_res->desc[0].start = 0; > + irq_res->desc[0].num = ud->tchan_cnt; > i = 1; > } else { > for (i = 0; i < rm_res->sets; i++) { > - irq_res.desc[i].start = rm_res->desc[i].start; > - irq_res.desc[i].num = rm_res->desc[i].num; > - irq_res.desc[i].start_sec = rm_res->desc[i].start_sec; > - irq_res.desc[i].num_sec = rm_res->desc[i].num_sec; > + irq_res->desc[i].start = rm_res->desc[i].start; > + irq_res->desc[i].num = rm_res->desc[i].num; > + irq_res->desc[i].start_sec = rm_res->desc[i].start_sec; > + irq_res->desc[i].num_sec = rm_res->desc[i].num_sec; > } > } > rm_res = tisci_rm->rm_ranges[RM_RANGE_RCHAN]; > if (IS_ERR(rm_res)) { > - irq_res.desc[i].start = 0; > - irq_res.desc[i].num = ud->rchan_cnt; > + irq_res->desc[i].start = 0; > + irq_res->desc[i].num = ud->rchan_cnt; > } else { > for (j = 0; j < rm_res->sets; j++, i++) { > if (rm_res->desc[j].num) { > - irq_res.desc[i].start = rm_res->desc[j].start + > + irq_res->desc[i].start = rm_res->desc[j].start + > ud->soc_data->oes.udma_rchan; > - irq_res.desc[i].num = rm_res->desc[j].num; > + irq_res->desc[i].num = rm_res->desc[j].num; > } > if (rm_res->desc[j].num_sec) { > - irq_res.desc[i].start_sec = rm_res->desc[j].start_sec + > + irq_res->desc[i].start_sec = rm_res->desc[j].start_sec + > ud->soc_data->oes.udma_rchan; > - irq_res.desc[i].num_sec = rm_res->desc[j].num_sec; > + irq_res->desc[i].num_sec = rm_res->desc[j].num_sec; > } > } > } > - ret = ti_sci_inta_msi_domain_alloc_irqs(ud->dev, &irq_res); > - kfree(irq_res.desc); > + ret = ti_sci_inta_msi_domain_alloc_irqs(ud->dev, irq_res); > + kfree(irq_res); > if (ret) { > dev_err(ud->dev, "Failed to allocate MSI interrupts\n"); > return ret; > @@ -4746,9 +4750,10 @@ static int bcdma_setup_resources(struct udma_dev *ud) > { > int ret, i, j; > struct device *dev = ud->dev; > - struct ti_sci_resource *rm_res, irq_res; > + struct ti_sci_resource *rm_res, *irq_res; > struct udma_tisci_rm *tisci_rm = &ud->tisci_rm; > const struct udma_oes_offsets *oes = &ud->soc_data->oes; > + u16 sets; > u32 cap; > > /* Set up the throughput level start indexes */ > @@ -4828,21 +4833,21 @@ static int bcdma_setup_resources(struct udma_dev *ud) > (char *)range_names[i]); > } > > - irq_res.sets = 0; > + sets = 0; > > /* bchan ranges */ > if (ud->bchan_cnt) { > rm_res = tisci_rm->rm_ranges[RM_RANGE_BCHAN]; > if (IS_ERR(rm_res)) { > bitmap_zero(ud->bchan_map, ud->bchan_cnt); > - irq_res.sets++; > + sets++; > } else { > bitmap_fill(ud->bchan_map, ud->bchan_cnt); > for (i = 0; i < rm_res->sets; i++) > udma_mark_resource_ranges(ud, ud->bchan_map, > &rm_res->desc[i], > "bchan"); > - irq_res.sets += rm_res->sets; > + sets += rm_res->sets; > } > } > > @@ -4851,14 +4856,14 @@ static int bcdma_setup_resources(struct udma_dev *ud) > rm_res = tisci_rm->rm_ranges[RM_RANGE_TCHAN]; > if (IS_ERR(rm_res)) { > bitmap_zero(ud->tchan_map, ud->tchan_cnt); > - irq_res.sets += 2; > + sets += 2; > } else { > bitmap_fill(ud->tchan_map, ud->tchan_cnt); > for (i = 0; i < rm_res->sets; i++) > udma_mark_resource_ranges(ud, ud->tchan_map, > &rm_res->desc[i], > "tchan"); > - irq_res.sets += rm_res->sets * 2; > + sets += rm_res->sets * 2; > } > } > > @@ -4867,36 +4872,39 @@ static int bcdma_setup_resources(struct udma_dev *ud) > rm_res = tisci_rm->rm_ranges[RM_RANGE_RCHAN]; > if (IS_ERR(rm_res)) { > bitmap_zero(ud->rchan_map, ud->rchan_cnt); > - irq_res.sets += 2; > + sets += 2; > } else { > bitmap_fill(ud->rchan_map, ud->rchan_cnt); > for (i = 0; i < rm_res->sets; i++) > udma_mark_resource_ranges(ud, ud->rchan_map, > &rm_res->desc[i], > "rchan"); > - irq_res.sets += rm_res->sets * 2; > + sets += rm_res->sets * 2; > } > } > > - irq_res.desc = kzalloc_objs(*irq_res.desc, irq_res.sets); > - if (!irq_res.desc) > + irq_res = kzalloc_flex(*irq_res, desc, sets); > + if (!irq_res) > return -ENOMEM; > + > + irq_res->sets = sets; > + > if (ud->bchan_cnt) { > rm_res = tisci_rm->rm_ranges[RM_RANGE_BCHAN]; > if (IS_ERR(rm_res)) { > - irq_res.desc[0].start = oes->bcdma_bchan_ring; > - irq_res.desc[0].num = ud->bchan_cnt; > + irq_res->desc[0].start = oes->bcdma_bchan_ring; > + irq_res->desc[0].num = ud->bchan_cnt; > i = 1; > } else { > for (i = 0; i < rm_res->sets; i++) { > - irq_res.desc[i].start = rm_res->desc[i].start + > + irq_res->desc[i].start = rm_res->desc[i].start + > oes->bcdma_bchan_ring; > - irq_res.desc[i].num = rm_res->desc[i].num; > + irq_res->desc[i].num = rm_res->desc[i].num; > > if (rm_res->desc[i].num_sec) { > - irq_res.desc[i].start_sec = rm_res->desc[i].start_sec + > + irq_res->desc[i].start_sec = rm_res->desc[i].start_sec + > oes->bcdma_bchan_ring; > - irq_res.desc[i].num_sec = rm_res->desc[i].num_sec; > + irq_res->desc[i].num_sec = rm_res->desc[i].num_sec; > } > } > } > @@ -4907,28 +4915,28 @@ static int bcdma_setup_resources(struct udma_dev *ud) > if (ud->tchan_cnt) { > rm_res = tisci_rm->rm_ranges[RM_RANGE_TCHAN]; > if (IS_ERR(rm_res)) { > - irq_res.desc[i].start = oes->bcdma_tchan_data; > - irq_res.desc[i].num = ud->tchan_cnt; > - irq_res.desc[i + 1].start = oes->bcdma_tchan_ring; > - irq_res.desc[i + 1].num = ud->tchan_cnt; > + irq_res->desc[i].start = oes->bcdma_tchan_data; > + irq_res->desc[i].num = ud->tchan_cnt; > + irq_res->desc[i + 1].start = oes->bcdma_tchan_ring; > + irq_res->desc[i + 1].num = ud->tchan_cnt; > i += 2; > } else { > for (j = 0; j < rm_res->sets; j++, i += 2) { > - irq_res.desc[i].start = rm_res->desc[j].start + > + irq_res->desc[i].start = rm_res->desc[j].start + > oes->bcdma_tchan_data; > - irq_res.desc[i].num = rm_res->desc[j].num; > + irq_res->desc[i].num = rm_res->desc[j].num; > > - irq_res.desc[i + 1].start = rm_res->desc[j].start + > + irq_res->desc[i + 1].start = rm_res->desc[j].start + > oes->bcdma_tchan_ring; > - irq_res.desc[i + 1].num = rm_res->desc[j].num; > + irq_res->desc[i + 1].num = rm_res->desc[j].num; > > if (rm_res->desc[j].num_sec) { > - irq_res.desc[i].start_sec = rm_res->desc[j].start_sec + > + irq_res->desc[i].start_sec = rm_res->desc[j].start_sec + > oes->bcdma_tchan_data; > - irq_res.desc[i].num_sec = rm_res->desc[j].num_sec; > - irq_res.desc[i + 1].start_sec = rm_res->desc[j].start_sec + > + irq_res->desc[i].num_sec = rm_res->desc[j].num_sec; > + irq_res->desc[i + 1].start_sec = rm_res->desc[j].start_sec + > oes->bcdma_tchan_ring; > - irq_res.desc[i + 1].num_sec = rm_res->desc[j].num_sec; > + irq_res->desc[i + 1].num_sec = rm_res->desc[j].num_sec; > } > } > } > @@ -4936,35 +4944,35 @@ static int bcdma_setup_resources(struct udma_dev *ud) > if (ud->rchan_cnt) { > rm_res = tisci_rm->rm_ranges[RM_RANGE_RCHAN]; > if (IS_ERR(rm_res)) { > - irq_res.desc[i].start = oes->bcdma_rchan_data; > - irq_res.desc[i].num = ud->rchan_cnt; > - irq_res.desc[i + 1].start = oes->bcdma_rchan_ring; > - irq_res.desc[i + 1].num = ud->rchan_cnt; > + irq_res->desc[i].start = oes->bcdma_rchan_data; > + irq_res->desc[i].num = ud->rchan_cnt; > + irq_res->desc[i + 1].start = oes->bcdma_rchan_ring; > + irq_res->desc[i + 1].num = ud->rchan_cnt; > i += 2; > } else { > for (j = 0; j < rm_res->sets; j++, i += 2) { > - irq_res.desc[i].start = rm_res->desc[j].start + > + irq_res->desc[i].start = rm_res->desc[j].start + > oes->bcdma_rchan_data; > - irq_res.desc[i].num = rm_res->desc[j].num; > + irq_res->desc[i].num = rm_res->desc[j].num; > > - irq_res.desc[i + 1].start = rm_res->desc[j].start + > + irq_res->desc[i + 1].start = rm_res->desc[j].start + > oes->bcdma_rchan_ring; > - irq_res.desc[i + 1].num = rm_res->desc[j].num; > + irq_res->desc[i + 1].num = rm_res->desc[j].num; > > if (rm_res->desc[j].num_sec) { > - irq_res.desc[i].start_sec = rm_res->desc[j].start_sec + > + irq_res->desc[i].start_sec = rm_res->desc[j].start_sec + > oes->bcdma_rchan_data; > - irq_res.desc[i].num_sec = rm_res->desc[j].num_sec; > - irq_res.desc[i + 1].start_sec = rm_res->desc[j].start_sec + > + irq_res->desc[i].num_sec = rm_res->desc[j].num_sec; > + irq_res->desc[i + 1].start_sec = rm_res->desc[j].start_sec + > oes->bcdma_rchan_ring; > - irq_res.desc[i + 1].num_sec = rm_res->desc[j].num_sec; > + irq_res->desc[i + 1].num_sec = rm_res->desc[j].num_sec; > } > } > } > } > > - ret = ti_sci_inta_msi_domain_alloc_irqs(ud->dev, &irq_res); > - kfree(irq_res.desc); > + ret = ti_sci_inta_msi_domain_alloc_irqs(ud->dev, irq_res); > + kfree(irq_res); > if (ret) { > dev_err(ud->dev, "Failed to allocate MSI interrupts\n"); > return ret; > @@ -4977,10 +4985,11 @@ static int pktdma_setup_resources(struct udma_dev *ud) > { > int ret, i, j; > struct device *dev = ud->dev; > - struct ti_sci_resource *rm_res, irq_res; > + struct ti_sci_resource *rm_res, *irq_res; > struct udma_tisci_rm *tisci_rm = &ud->tisci_rm; > const struct udma_oes_offsets *oes = &ud->soc_data->oes; > u32 cap3; > + u16 sets; > > /* Set up the throughput level start indexes */ > cap3 = udma_read(ud->mmrs[MMR_GCFG], 0x2c); > @@ -5057,13 +5066,13 @@ static int pktdma_setup_resources(struct udma_dev *ud) > if (IS_ERR(rm_res)) { > /* all rflows are assigned exclusively to Linux */ > bitmap_zero(ud->rflow_in_use, ud->rflow_cnt); > - irq_res.sets = 1; > + sets = 1; > } else { > bitmap_fill(ud->rflow_in_use, ud->rflow_cnt); > for (i = 0; i < rm_res->sets; i++) > udma_mark_resource_ranges(ud, ud->rflow_in_use, > &rm_res->desc[i], "rflow"); > - irq_res.sets = rm_res->sets; > + sets = rm_res->sets; > } > > /* tflow ranges */ > @@ -5071,55 +5080,58 @@ static int pktdma_setup_resources(struct udma_dev *ud) > if (IS_ERR(rm_res)) { > /* all tflows are assigned exclusively to Linux */ > bitmap_zero(ud->tflow_map, ud->tflow_cnt); > - irq_res.sets++; > + sets++; > } else { > bitmap_fill(ud->tflow_map, ud->tflow_cnt); > for (i = 0; i < rm_res->sets; i++) > udma_mark_resource_ranges(ud, ud->tflow_map, > &rm_res->desc[i], "tflow"); > - irq_res.sets += rm_res->sets; > + sets += rm_res->sets; > } > > - irq_res.desc = kzalloc_objs(*irq_res.desc, irq_res.sets); > - if (!irq_res.desc) > + irq_res = kzalloc_flex(*irq_res, desc, sets); > + if (!irq_res) > return -ENOMEM; > + > + irq_res->sets = sets; > + > rm_res = tisci_rm->rm_ranges[RM_RANGE_TFLOW]; > if (IS_ERR(rm_res)) { > - irq_res.desc[0].start = oes->pktdma_tchan_flow; > - irq_res.desc[0].num = ud->tflow_cnt; > + irq_res->desc[0].start = oes->pktdma_tchan_flow; > + irq_res->desc[0].num = ud->tflow_cnt; > i = 1; > } else { > for (i = 0; i < rm_res->sets; i++) { > - irq_res.desc[i].start = rm_res->desc[i].start + > + irq_res->desc[i].start = rm_res->desc[i].start + > oes->pktdma_tchan_flow; > - irq_res.desc[i].num = rm_res->desc[i].num; > + irq_res->desc[i].num = rm_res->desc[i].num; > > if (rm_res->desc[i].num_sec) { > - irq_res.desc[i].start_sec = rm_res->desc[i].start_sec + > + irq_res->desc[i].start_sec = rm_res->desc[i].start_sec + > oes->pktdma_tchan_flow; > - irq_res.desc[i].num_sec = rm_res->desc[i].num_sec; > + irq_res->desc[i].num_sec = rm_res->desc[i].num_sec; > } > } > } > rm_res = tisci_rm->rm_ranges[RM_RANGE_RFLOW]; > if (IS_ERR(rm_res)) { > - irq_res.desc[i].start = oes->pktdma_rchan_flow; > - irq_res.desc[i].num = ud->rflow_cnt; > + irq_res->desc[i].start = oes->pktdma_rchan_flow; > + irq_res->desc[i].num = ud->rflow_cnt; > } else { > for (j = 0; j < rm_res->sets; j++, i++) { > - irq_res.desc[i].start = rm_res->desc[j].start + > + irq_res->desc[i].start = rm_res->desc[j].start + > oes->pktdma_rchan_flow; > - irq_res.desc[i].num = rm_res->desc[j].num; > + irq_res->desc[i].num = rm_res->desc[j].num; > > if (rm_res->desc[j].num_sec) { > - irq_res.desc[i].start_sec = rm_res->desc[j].start_sec + > + irq_res->desc[i].start_sec = rm_res->desc[j].start_sec + > oes->pktdma_rchan_flow; > - irq_res.desc[i].num_sec = rm_res->desc[j].num_sec; > + irq_res->desc[i].num_sec = rm_res->desc[j].num_sec; > } > } > } > - ret = ti_sci_inta_msi_domain_alloc_irqs(ud->dev, &irq_res); > - kfree(irq_res.desc); > + ret = ti_sci_inta_msi_domain_alloc_irqs(ud->dev, irq_res); > + kfree(irq_res); > if (ret) { > dev_err(ud->dev, "Failed to allocate MSI interrupts\n"); > return ret; > diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c > index 590a464403c5..ef23d732e083 100644 > --- a/drivers/firmware/ti_sci.c > +++ b/drivers/firmware/ti_sci.c > @@ -3693,16 +3693,11 @@ devm_ti_sci_get_resource_sets(const struct ti_sci_handle *handle, > bool valid_set = false; > int i, ret, res_count; > > - res = devm_kzalloc(dev, sizeof(*res), GFP_KERNEL); > + res = devm_kzalloc(dev, struct_size(res, desc, sets), GFP_KERNEL); > if (!res) > return ERR_PTR(-ENOMEM); > > res->sets = sets; > - res->desc = devm_kcalloc(dev, res->sets, sizeof(*res->desc), > - GFP_KERNEL); > - if (!res->desc) > - return ERR_PTR(-ENOMEM); > - > for (i = 0; i < res->sets; i++) { > ret = handle->ops.rm_core_ops.get_range(handle, dev_id, > sub_types[i], > diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h > index fd104b666836..7632bb11c862 100644 > --- a/include/linux/soc/ti/ti_sci_protocol.h > +++ b/include/linux/soc/ti/ti_sci_protocol.h > @@ -599,7 +599,7 @@ struct ti_sci_handle { > struct ti_sci_resource { > u16 sets; > raw_spinlock_t lock; > - struct ti_sci_resource_desc *desc; > + struct ti_sci_resource_desc desc[] __counted_by(sets); > }; > > #if IS_ENABLED(CONFIG_TI_SCI_PROTOCOL) > -- > 2.54.0 >