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Thu, 05 Nov 2026 20:26:36 -0800 (PST) Received: from killingmachine ([46.188.59.33]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-492d6d63b6esm1272958f8f.10.2026.11.05.20.26.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2026 20:26:36 -0800 (PST) Date: Fri, 6 Nov 2026 07:26:34 +0300 From: Sergey Matsievskiy To: Frank Li Cc: dmaengine@vger.kernel.org, lars@metafoo.de, vkoul@kernel.org, Frank.Li@kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] dmaengine: axi-dmac: add reset deassert logic Message-ID: References: <20261105134040.315317-1-s.matsievskiy@yadro.com> X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: > " sometimes required for ..." is it correct? most likely some SoC require > a addtional reset for this dma controller. I'd say, when this controller is used in FPGA, it could be used without the external reset. In SoC, it almost certainly would be behind the reset controller.