From: Lizhi Hou <lizhi.hou@amd.com>
To: Randy Dunlap <rdunlap@infradead.org>, <vkoul@kernel.org>,
<dmaengine@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: Nishad Saraf <nishads@amd.com>, <max.zhen@amd.com>,
<sonal.santan@amd.com>
Subject: Re: [RESEND PATCH V2 QDMA 1/1] dmaengine: amd: qdma: Add AMD QDMA driver
Date: Wed, 12 Jul 2023 17:51:42 -0700 [thread overview]
Message-ID: <c64f5cb7-4750-512d-f105-dff6ec03de12@amd.com> (raw)
In-Reply-To: <5955d0ec-cd3a-5ad3-2c28-4ae819d1366d@infradead.org>
On 7/12/23 14:19, Randy Dunlap wrote:
> Hi--
>
> On 7/12/23 09:25, Lizhi Hou wrote:
>> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
>> index 644c188d6a11..89b26e68988a 100644
>> --- a/drivers/dma/Kconfig
>> +++ b/drivers/dma/Kconfig
>> @@ -85,6 +85,19 @@ config AMCC_PPC440SPE_ADMA
>> help
>> Enable support for the AMCC PPC440SPe RAID engines.
>>
>> +config AMD_QDMA
>> + tristate "AMD Queue-based DMA"
>> + depends on HAS_IOMEM
>> + select DMA_ENGINE
>> + select DMA_VIRTUAL_CHANNELS
>> + select REGMAP_MMIO
>> + help
>> + Enable support for the AMD Queue-based DMA subsystem.The primary
> Need a space... DMA subsystem. The primary
Oh, ok. I will fix it.
Thanks,
Lizhi
>
>> + mechanism to transfer data using the QDMA is for the QDMA engine to
>> + operate on instructions (descriptors) provided by the host operating
>> + system. Using the descriptors, the QDMA can move data in both the Host
>> + to Card (H2C) direction, or the Card to Host (C2H) direction.
prev parent reply other threads:[~2023-07-13 0:51 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-12 16:25 [RESEND PATCH V2 QDMA 0/1] AMD QDMA driver Lizhi Hou
2023-07-12 16:25 ` [RESEND PATCH V2 QDMA 1/1] dmaengine: amd: qdma: Add " Lizhi Hou
2023-07-12 21:19 ` Randy Dunlap
2023-07-13 0:51 ` Lizhi Hou [this message]
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