From: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
To: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>,
Vinod Koul <vkoul@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
dmaengine@vger.kernel.org (open list:DMA GENERIC OFFLOAD ENGINE
SUBSYSTEM),
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-kernel@vger.kernel.org (open list),
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Niravkumar L Rabara <niravkumar.l.rabara@intel.com>,
linux-mtd@lists.infradead.org (open list:CADENCE NAND DRIVER),
Dinh Nguyen <dinguyen@kernel.org>,
Khairul Anuar Romli <khairul.anuar.romli@altera.com>,
Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Subject: [PATCH 0/3] Add iommu supports
Date: Mon, 13 Oct 2025 09:06:52 +0800 [thread overview]
Message-ID: <cover.1760316996.git.khairul.anuar.romli@altera.com> (raw)
Add iommu property bindings to cadence hp-nfc and synopsis dw-axi-dmac.
Add smmu node in Agilex5 dts with the iommu bindings added.
Khairul Anuar Romli (3):
dt-bindings: mtd: cdns,hp-nfc: Add iommu property
dt-bindings: dma: snps,dw-axi-dmac: Add iommu property
arm64: dts: socfpga: agilex5: Add SMMU nodes
.../bindings/dma/snps,dw-axi-dmac.yaml | 3 +++
.../devicetree/bindings/mtd/cdns,hp-nfc.yaml | 3 +++
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 16 ++++++++++++++++
3 files changed, 22 insertions(+)
--
2.35.3
next reply other threads:[~2025-10-13 1:07 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-13 1:06 Khairul Anuar Romli [this message]
2025-10-13 1:06 ` [PATCH 1/3] dt-bindings: mtd: cdns,hp-nfc: Add iommu property Khairul Anuar Romli
2025-10-13 1:09 ` Krzysztof Kozlowski
2025-10-13 1:06 ` [PATCH 2/3] dt-bindings: dma: snps,dw-axi-dmac: " Khairul Anuar Romli
2025-10-13 1:06 ` [PATCH 3/3] arm64: dts: socfpga: agilex5: Add SMMU nodes Khairul Anuar Romli
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